From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bruce Richardson Subject: [PATCH 04/18] eal: remove unneeded conditionals for SSE headers Date: Tue, 20 Jun 2017 16:22:59 +0100 Message-ID: <20170620152313.107642-5-bruce.richardson@intel.com> References: <20170620152313.107642-1-bruce.richardson@intel.com> Cc: Bruce Richardson , dev@dpdk.org To: Konstantin Ananyev Return-path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id F28675689 for ; Tue, 20 Jun 2017 18:37:25 +0200 (CEST) In-Reply-To: <20170620152313.107642-1-bruce.richardson@intel.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Our x86 baseline is to have support for SSE4.2, so therefore there is no point in conditions around the inclusion of SSE1 - SSE4 headers. Signed-off-by: Bruce Richardson --- lib/librte_eal/common/include/arch/x86/rte_vect.h | 16 +--------------- 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/lib/librte_eal/common/include/arch/x86/rte_vect.h b/lib/librte_eal/common/include/arch/x86/rte_vect.h index 1b4b85d..03fc991 100644 --- a/lib/librte_eal/common/include/arch/x86/rte_vect.h +++ b/lib/librte_eal/common/include/arch/x86/rte_vect.h @@ -45,21 +45,7 @@ #if (defined(__ICC) || (__GNUC__ == 4 && __GNUC_MINOR__ < 4)) -#ifdef __SSE__ -#include -#endif - -#ifdef __SSE2__ -#include -#endif - -#ifdef __SSE3__ -#include -#endif - -#if defined(__SSE4_2__) || defined(__SSE4_1__) -#include -#endif +#include /* SSE4 */ #if defined(__AVX__) #include -- 2.9.4