From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Hemminger Subject: [PATCH v2 3/3] mlx5: handle 32 bit PCI domain Date: Thu, 22 Jun 2017 08:56:41 -0700 Message-ID: <20170622155641.25916-4-stephen@networkplumber.org> References: <20170622155641.25916-1-stephen@networkplumber.org> Cc: Stephen Hemminger , Stephen Hemminger To: dev@dpdk.org Return-path: Received: from mail-pg0-f54.google.com (mail-pg0-f54.google.com [74.125.83.54]) by dpdk.org (Postfix) with ESMTP id 6FFB758F6 for ; Thu, 22 Jun 2017 17:56:54 +0200 (CEST) Received: by mail-pg0-f54.google.com with SMTP id u62so9503431pgb.3 for ; Thu, 22 Jun 2017 08:56:54 -0700 (PDT) In-Reply-To: <20170622155641.25916-1-stephen@networkplumber.org> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The PCI domain in Azure maybe 32 bits. When device is passed through the domain is synthesize from the internal GUID. Signed-off-by: Stephen Hemminger --- drivers/net/mlx5/mlx5_ethdev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c index eadf452b9e95..6a5733354b2c 100644 --- a/drivers/net/mlx5/mlx5_ethdev.c +++ b/drivers/net/mlx5/mlx5_ethdev.c @@ -1185,7 +1185,7 @@ mlx5_ibv_device_to_pci_addr(const struct ibv_device *device, /* Extract information. */ if (sscanf(line, "PCI_SLOT_NAME=" - "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n", + "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n", &pci_addr->domain, &pci_addr->bus, &pci_addr->devid, -- 2.11.0