From mboxrd@z Thu Jan 1 00:00:00 1970 From: Qi Zhang Subject: [PATCH v2] doc: add known issue for i40e VF performance Date: Sun, 2 Jul 2017 23:57:54 -0400 Message-ID: <20170703035754.4622-1-qi.z.zhang@intel.com> Cc: helin.zhang@intel.com, dev@dpdk.org, Qi Zhang To: john.mcnamara@intel.com, jingjing.wu@intel.com Return-path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id ABF8B2B99 for ; Mon, 3 Jul 2017 05:07:29 +0200 (CEST) List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" VF performance is limited by the kernel PCI extended tag setting. Update the document to explain the known issue and the workaround. Signed-off-by: Qi Zhang --- v2: - follow number list format. - improve the comments. doc/guides/nics/i40e.rst | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst index 4d3c7ca..2f2cf6d 100644 --- a/doc/guides/nics/i40e.rst +++ b/doc/guides/nics/i40e.rst @@ -447,3 +447,30 @@ It means if APP has set the max bandwidth for that TC, it comes to no effect. It's suggested to set the strict priority mode for a TC that is latency sensitive but no consuming much bandwidth. + +VF performance is impacted by PCI extended tag setting +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +To reach maximum NIC performance in the VF the PCI extended tag must be +enabled. The DPDK I40E PF drvier will set this feature during initialization, +but the kernel PF driver does not. So when running traffic on a VF which is +managed by the kernel PF driver, a significent NIC performance downgrade has +been observed (for 64 byte packets, there is about 25% linerate downgrade for +a 25G device and about 35% for a 40G device). + +For kernel version >= 4.11, the kernel's PCI driver will enable the extended +tag if it detects that the device supports it. So by default, this is not an +issue. For kernels <= 4.11 or When the PCI extended tag is disabled it can be +enabled using the steps below. + +#. Get the current value of the PCI configure register:: + + setpci -s a8.w + +#. Set bit 8:: + + value = value | 0x100 + +#. Set the PCI configure register with new value:: + + setpci -s a8.w= -- 2.9.3