From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Subject: Re: [PATCH v3] eal/x86: implement x86 specific tsc hz
Date: Mon, 2 Oct 2017 16:54:04 +0530
Message-ID: <20171002112403.GA13389@jerin>
References: <20171002100930.78602-1-sergio.gonzalez.monroy@intel.com>
 <20171002111738.79520-1-sergio.gonzalez.monroy@intel.com>
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Cc: dev@dpdk.org, harry.van.haaren@intel.com, bruce.richardson@intel.com
To: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
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-----Original Message-----
> Date: Mon, 2 Oct 2017 12:17:38 +0100
> From: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
> To: dev@dpdk.org
> CC: harry.van.haaren@intel.com, bruce.richardson@intel.com
> Subject: [dpdk-dev] [PATCH v3] eal/x86: implement x86 specific tsc hz
> X-Mailer: git-send-email 2.9.5
> 
> First, try to use CPUID Time Stamp Counter and Nominal Core Crystal
> Clock Information Leaf to determine the tsc hz on platforms that
> supports it (does not require privileged user).
> 
> If the CPUID leaf is not available, then try to determine the tsc hz by
> reading the MSR 0xCE (requires privileged user).
> 
> Default to the tsc hz estimation if both methods fail.
> 
> Signed-off-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
> Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
> Tested-by: Bruce Richardson <bruce.richardson@intel.com>
> ---
> DEPENDS on:
> http://dpdk.org/dev/patchwork/patch/29086/
> 
> v3:
>  - acked-by and tested-by tags
> 
> v2:
>  - fix misspelled word in commit message
>  - address comment for more clear code
> 
>  lib/librte_eal/common/arch/x86/rte_cycles.c        | 142 +++++++++++++++++++++
>  .../common/include/arch/x86/rte_cycles.h           |   7 +-
>  lib/librte_eal/linuxapp/eal/Makefile               |   1 +
>  3 files changed, 145 insertions(+), 5 deletions(-)
>  create mode 100644 lib/librte_eal/common/arch/x86/rte_cycles.c
> +
> +static uint32_t
> +check_model_wsm_nhm(uint8_t model)
> +{
> +	switch (model) {
> +	/* Westmere */
> +	case 0x25:
> +	case 0x2C:
> +	case 0x2F:
> +	/* Nehalem */
> +	case 0x1E:
> +	case 0x1F:
> +	case 0x1A:

See next comment.

> +	case 0x2E:
> +		return 1;
> +	}
> +
> +	return 0;
> +}
> +
> +static uint32_t
> +check_model_gdm_dnv(uint8_t model)
> +{
> +	switch (model) {
> +	/* Goldmont */
> +	case 0x5C:
> +	/* Denverton */

Not adding "/* fall-through */" may break gcc 7 build.

> +	case 0x5F:
> +		return 1;
> +	}
> +
> +	return 0;
> +}
> +