From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jianbo Liu <Jianbo.Liu@arm.com>
Subject: Re: [PATCH 02/16] net/axgbe: add register map and
 related macros
Date: Mon, 11 Dec 2017 15:20:33 +0800
Message-ID: <20171211072032.GA16288@arm.com>
References: <1512047472-118050-1-git-send-email-Ravi1.kumar@amd.com>
 <1512047472-118050-2-git-send-email-Ravi1.kumar@amd.com>
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To: Ravi Kumar <Ravi1.kumar@amd.com>
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The 11/30/2017 08:10, Ravi Kumar wrote:
> Signed-off-by: Ravi Kumar <Ravi1.kumar@amd.com>
> ---
>  drivers/net/axgbe/axgbe_common.h | 1645 ++++++++++++++++++++++++++++++++=
+++++-
>  1 file changed, 1644 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_c=
ommon.h
> index 4af811a..9a5808d 100644
> --- a/drivers/net/axgbe/axgbe_common.h
> +++ b/drivers/net/axgbe/axgbe_common.h

...

> +/* Macros for building, reading or writing register values or bits
> + * within the register values of SerDes integration registers.
> + */
> +#define XSIR_GET_BITS(_var, _prefix, _field)                            =
\
> +     GET_BITS((_var),                                                \
> +              _prefix##_##_field##_INDEX,                            \
> +              _prefix##_##_field##_WIDTH)
> +
> +#define XSIR_SET_BITS(_var, _prefix, _field, _val)                      =
\
> +     SET_BITS((_var),                                                \
> +              _prefix##_##_field##_INDEX,                            \
> +              _prefix##_##_field##_WIDTH, (_val))
> +
> +#define XSIR0_IOREAD(_pdata, _reg)                                   \
> +     rte_read16((void *)((_pdata)->sir0_regs + (_reg)))
> +
> +#define XSIR0_IOREAD_BITS(_pdata, _reg, _field)                         =
     \
> +     GET_BITS(XSIR0_IOREAD((_pdata), _reg),                          \
> +              _reg##_##_field##_INDEX,                               \
> +              _reg##_##_field##_WIDTH)
> +
> +#define XSIR0_IOWRITE(_pdata, _reg, _val)                            \
> +     rte_read16((_val), (void *)((_pdata)->sir0_regs + (_reg)))

rte_write16?

> +
> +#define XSIR0_IOWRITE_BITS(_pdata, _reg, _field, _val)                  =
     \
> +do {                                                                 \
> +     u16 reg_val =3D XSIR0_IOREAD((_pdata), _reg);                     \
> +     SET_BITS(reg_val,                                               \
> +              _reg##_##_field##_INDEX,                               \
> +              _reg##_##_field##_WIDTH, (_val));                      \
> +     XSIR0_IOWRITE((_pdata), _reg, reg_val);                         \
> +} while (0)
> +
> +#define XSIR1_IOREAD(_pdata, _reg)                                   \
> +     rte_read16((void *)((_pdata)->sir1_regs + _reg))
> +
> +#define XSIR1_IOREAD_BITS(_pdata, _reg, _field)                         =
     \
> +     GET_BITS(XSIR1_IOREAD((_pdata), _reg),                          \
> +              _reg##_##_field##_INDEX,                               \
> +              _reg##_##_field##_WIDTH)
> +
> +#define XSIR1_IOWRITE(_pdata, _reg, _val)                            \
> +     rte_read16((_val), (void *)((_pdata)->sir1_regs + (_reg)))

rte_write16?

> +
> +#define XSIR1_IOWRITE_BITS(_pdata, _reg, _field, _val)                  =
     \
> +do {                                                                 \
> +     u16 reg_val =3D XSIR1_IOREAD((_pdata), _reg);                     \
> +     SET_BITS(reg_val,                                               \
> +              _reg##_##_field##_INDEX,                               \
> +              _reg##_##_field##_WIDTH, (_val));                      \
> +     XSIR1_IOWRITE((_pdata), _reg, reg_val);                         \
> +} while (0)
> +

....
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