From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bruce Richardson <bruce.richardson@intel.com>
Subject: Re: [PATCH v2 2/2] eal/x86: Use lock-prefixed
 instructions to reduce cost of rte_smp_mb()
Date: Mon, 18 Dec 2017 15:46:06 +0000
Message-ID: <20171218154606.GA13148@bricha3-MOBL3.ger.corp.intel.com>
References: <1512126771-27503-2-git-send-email-konstantin.ananyev@intel.com>
 <1513611253-8785-3-git-send-email-konstantin.ananyev@intel.com>
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To: Konstantin Ananyev <konstantin.ananyev@intel.com>
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On Mon, Dec 18, 2017 at 03:34:13PM +0000, Konstantin Ananyev wrote:
> On x86 it  is possible to use lock-prefixed instructions to get
> the similar effect as mfence.
> As pointed by Java guys, on most modern HW that gives a better
> performance than using mfence:
> https://shipilev.net/blog/2014/on-the-fence-with-dependencies/
> That patch adopts that technique for rte_smp_mb() implementation.
> On BDW 2.2 mb_autotest on single lcore reports 2X cycle reduction,
> i.e. from ~110 to ~55 cycles per operation.
> 
> Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
> ---
Acked-by: Bruce Richardson <bruce.richardson@intel.com>