From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Monjalon Subject: [PATCH] eal/arm64: fix memory barrier macros Date: Tue, 16 Jan 2018 00:59:34 +0100 Message-ID: <20180115235934.16054-1-thomas@monjalon.net> Cc: dev@dpdk.org To: jerin.jacob@caviumnetworks.com Return-path: Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) by dpdk.org (Postfix) with ESMTP id 0DDE91041 for ; Tue, 16 Jan 2018 01:00:12 +0100 (CET) List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The macros dsb and dmb are defined as an instruction block with braces. As a consequence, when it is used in if/else without brace: if (cond) rte_mb(); else statement; the added semicolon is parsed outside of if/else, so the "else" cannot match the "if": if (cond) { asm volatile("dsb sy" : : : "memory"); } ; else statement The solution is either to use the "do { } while (0)" construct, or simply remove the braces because there is only one statement. Fixes: 84733fd0d75e ("eal/arm64: fix memory barrier definition") Signed-off-by: Thomas Monjalon --- lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h index b6bbd0b32..b012dfa74 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h @@ -15,8 +15,8 @@ extern "C" { #include "generic/rte_atomic.h" -#define dsb(opt) { asm volatile("dsb " #opt : : : "memory"); } -#define dmb(opt) { asm volatile("dmb " #opt : : : "memory"); } +#define dsb(opt) asm volatile("dsb " #opt : : : "memory") +#define dmb(opt) asm volatile("dmb " #opt : : : "memory") #define rte_mb() dsb(sy) -- 2.15.1