From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shreyansh Jain Subject: [PATCH 0/3] Optimization for DPAA/DPAA2 for PA/VA Addressing Date: Fri, 27 Apr 2018 21:55:53 +0530 Message-ID: <20180427162556.22781-1-shreyansh.jain@nxp.com> Mime-Version: 1.0 Content-Type: text/plain Cc: hemant.agrawal@nxp.com, akhil.goyal@nxp.com, anatoly.burakov@intel.com, Shreyansh Jain To: thomas@monjalon.net, dev@dpdk.org Return-path: Received: from EUR01-VE1-obe.outbound.protection.outlook.com (mail-ve1eur01on0057.outbound.protection.outlook.com [104.47.1.57]) by dpdk.org (Postfix) with ESMTP id A9E8B8DAC for ; Fri, 27 Apr 2018 18:10:02 +0200 (CEST) List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Once the hotplugging (6b42f7563) patchset were merged, DPAA2 Physical Addressing mode and DPAA observed drastic performance drop (~95%) This was because of an inherent assumption while doing some memory translation that memsegs would be physically contiguous This series attempts to add a workaround for that - a intermediary one while complete solution is integrated This work around creates a linked list of referenced buffers and attempts to search through it during physical to virtual translations. Shreyansh Jain (3): crypto/dpaa_sec: remove ctx based offset for PA-VA conversion bus/fslmc: optimize physical to virtual address searching bus/dpaa: optimize physical to virtual address searching drivers/bus/dpaa/rte_dpaa_bus.h | 27 +++++++++++++++++- drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 23 +++++++++++++++ drivers/crypto/dpaa_sec/dpaa_sec.c | 49 +++++++++++++------------------- drivers/mempool/dpaa/dpaa_mempool.c | 33 ++++++++++++++++++++- drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 43 ++++++++++++++++++++++++++++ 5 files changed, 144 insertions(+), 31 deletions(-) -- 2.14.1