From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shreyansh Jain Subject: [PATCH v3 12/15] net/dpaa2: optimize the fd reset in Tx path Date: Fri, 12 Oct 2018 15:34:23 +0530 Message-ID: <20181012100426.29349-13-shreyansh.jain@nxp.com> References: <20180926180440.31726-1-shreyansh.jain@nxp.com> <20181012100426.29349-1-shreyansh.jain@nxp.com> Mime-Version: 1.0 Content-Type: text/plain Cc: ferruh.yigit@intel.com, dev@dpdk.org, Hemant Agrawal To: thomas@monjalon.net Return-path: Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-he1eur01on0059.outbound.protection.outlook.com [104.47.0.59]) by dpdk.org (Postfix) with ESMTP id 0CF521B4AE for ; Fri, 12 Oct 2018 12:05:59 +0200 (CEST) In-Reply-To: <20181012100426.29349-1-shreyansh.jain@nxp.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Hemant Agrawal various field of FD structure was getting reset in scattered fashion. This patch align them in single macro. Signed-off-by: Hemant Agrawal --- drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 6 ++++++ drivers/net/dpaa2/dpaa2_rxtx.c | 8 +++----- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h index ec8f42806..2129b9154 100644 --- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h +++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h @@ -209,6 +209,12 @@ enum qbman_fd_format { #define DPAA2_RESET_FD_CTRL(fd) ((fd)->simple.ctrl = 0) #define DPAA2_SET_FD_ASAL(fd, asal) ((fd)->simple.ctrl |= (asal << 16)) + +#define DPAA2_RESET_FD_FLC(fd) do { \ + (fd)->simple.flc_lo = 0; \ + (fd)->simple.flc_hi = 0; \ +} while (0) + #define DPAA2_SET_FD_FLC(fd, addr) do { \ (fd)->simple.flc_lo = lower_32_bits((size_t)(addr)); \ (fd)->simple.flc_hi = upper_32_bits((uint64_t)(addr)); \ diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c index e96e84871..fcd48b389 100644 --- a/drivers/net/dpaa2/dpaa2_rxtx.c +++ b/drivers/net/dpaa2/dpaa2_rxtx.c @@ -30,7 +30,9 @@ DPAA2_SET_FD_LEN(_fd, _mbuf->data_len); \ DPAA2_SET_ONLY_FD_BPID(_fd, _bpid); \ DPAA2_SET_FD_OFFSET(_fd, _mbuf->data_off); \ - DPAA2_SET_FD_ASAL(_fd, DPAA2_ASAL_VAL); \ + DPAA2_SET_FD_FRC(_fd, 0); \ + DPAA2_RESET_FD_CTRL(_fd); \ + DPAA2_RESET_FD_FLC(_fd); \ } while (0) static inline void __attribute__((hot)) @@ -689,7 +691,6 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) /*Prepare enqueue descriptor*/ qbman_eq_desc_clear(&eqdesc); qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ); - qbman_eq_desc_set_response(&eqdesc, 0, 0); qbman_eq_desc_set_qd(&eqdesc, priv->qdid, dpaa2_q->flow_id, dpaa2_q->tc_index); /*Clear the unused FD fields before sending*/ @@ -717,9 +718,6 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts) (*bufs)->seqn = DPAA2_INVALID_MBUF_SEQN; } - fd_arr[loop].simple.frc = 0; - DPAA2_RESET_FD_CTRL((&fd_arr[loop])); - DPAA2_SET_FD_FLC((&fd_arr[loop]), (size_t)NULL); if (likely(RTE_MBUF_DIRECT(*bufs))) { mp = (*bufs)->pool; /* Check the basic scenario and set -- 2.17.1