From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yongseok Koh Subject: [PATCH v3] build: disable gcc AVX512F support Date: Sat, 3 Nov 2018 01:06:32 +0000 Message-ID: <20181103010623.42468-1-yskoh@mellanox.com> References: <20181023212318.43082-1-yskoh@mellanox.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Cc: "dev@dpdk.org" , Shahaf Shuler , "konstantin.ananyev@intel.com" , "anatoly.burakov@intel.com" , Yongseok Koh , "stable@dpdk.org" To: Thomas Monjalon , "bruce.richardson@intel.com" , "ferruh.yigit@intel.com" Return-path: In-Reply-To: <20181023212318.43082-1-yskoh@mellanox.com> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This is a workaround to prevent a crash, which might be caused by optimization of newer gcc (7.3.0) on Intel Skylake. This disables AVX512F support of gcc by adding -mno-avx512f if it is disabled in DPDK (CONFIG_RTE_ENABLE_AVX512=3Dn). This does not apply to the meson build as that doesn't have such an option but always enable AVX512F whenever supported. Bugzilla ID: 97 Cc: stable@dpdk.org Signed-off-by: Yongseok Koh --- v3: * use AUTO_CPUFLAGS instead of redundant check for gcc * remove the change from meson build v2: * disable the flag only in case of gcc mk/rte.cpuflags.mk | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk index 43ed84155b..c3291b17a1 100644 --- a/mk/rte.cpuflags.mk +++ b/mk/rte.cpuflags.mk @@ -68,6 +68,11 @@ endif ifneq ($(filter $(AUTO_CPUFLAGS),__AVX512F__),) ifeq ($(CONFIG_RTE_ENABLE_AVX512),y) CPUFLAGS +=3D AVX512F +else +# disable AVX512F support of gcc as a workaround for Bug 97 +ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y) +MACHINE_CFLAGS +=3D -mno-avx512f +endif endif endif =20 --=20 2.11.0