From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6ACE5C10F25 for ; Tue, 10 Mar 2020 00:34:19 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 2B58F24654 for ; Tue, 10 Mar 2020 00:34:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2B58F24654 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 06D941C011; Tue, 10 Mar 2020 01:33:53 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 67DD61BFFF for ; Tue, 10 Mar 2020 01:33:51 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Mar 2020 17:33:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,535,1574150400"; d="scan'208";a="414999502" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by orsmga005.jf.intel.com with ESMTP; 09 Mar 2020 17:33:49 -0700 From: Qi Zhang To: qiming.yang@intel.com, beilei.xing@intel.com Cc: xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang , Xiaoyun Li , Paul M Stillwell Jr Date: Tue, 10 Mar 2020 08:37:10 +0800 Message-Id: <20200310003711.47846-4-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200310003711.47846-1-qi.z.zhang@intel.com> References: <20200310003711.47846-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH 3/4] common/iavf: add support for DCF capability negotiation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add DCF capability flag for VF. Add an opcode for disabling DCF capability. Add an virtchnl event code for AVF resetting completion. Signed-off-by: Xiaoyun Li Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang --- drivers/common/iavf/virtchnl.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h index 3e544b95a..f6af14ae3 100644 --- a/drivers/common/iavf/virtchnl.h +++ b/drivers/common/iavf/virtchnl.h @@ -131,6 +131,7 @@ enum virtchnl_ops { /* opcodes 34, 35, 36, 37 and 38 are reserved */ VIRTCHNL_OP_DCF_CMD_DESC = 39, VIRTCHNL_OP_DCF_CMD_BUFF = 40, + VIRTCHNL_OP_DCF_DISABLE = 41, }; /* These macros are used to generate compilation errors if a structure/union @@ -245,6 +246,7 @@ VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_vsi_resource); #define VIRTCHNL_VF_OFFLOAD_ADQ 0X00800000 #define VIRTCHNL_VF_OFFLOAD_ADQ_V2 0X01000000 #define VIRTCHNL_VF_OFFLOAD_USO 0X02000000 +#define VIRTCHNL_VF_CAP_DCF 0X40000000 /* 0X80000000 is reserved */ /* Define below the capability flags that are not offloads */ @@ -887,6 +889,8 @@ virtchnl_vc_validate_vf_msg(struct virtchnl_version_info *ver, u32 v_opcode, * so the validation needs to be done in PF's context. */ return 0; + case VIRTCHNL_OP_DCF_DISABLE: + break; /* These are always errors coming from the VF. */ case VIRTCHNL_OP_EVENT: case VIRTCHNL_OP_UNKNOWN: -- 2.13.6