From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 694F2C38A2A for ; Fri, 8 May 2020 22:38:39 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 174652184D for ; Fri, 8 May 2020 22:38:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 174652184D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CFA3A1D9E3; Sat, 9 May 2020 00:38:37 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id B90071D9E3 for ; Sat, 9 May 2020 00:38:36 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F22681FB; Fri, 8 May 2020 15:38:35 -0700 (PDT) Received: from dp6132.usa.Arm.com (dp6132.usa.arm.com [10.118.91.150]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E8E253F68F; Fri, 8 May 2020 15:38:35 -0700 (PDT) From: Dharmik Thakkar To: Wenzhuo Lu , Jingjing Wu , Bernard Iremonger Cc: dev@dpdk.org, nd@arm.com, Dharmik Thakkar Date: Fri, 8 May 2020 22:38:25 +0000 Message-Id: <20200508223829.3228-1-dharmik.thakkar@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200506215847.7628-1-dharmik.thakkar@arm.com> References: <20200506215847.7628-1-dharmik.thakkar@arm.com> Subject: [dpdk-dev] [PATCH v2 1/5] app/testpmd: print clock with CPU cycles per pkt X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On aarch64 platforms, the cycles are counted using either a low-resolution generic counter or a high-resolution PMU cycle counter. Print the clock frequency along with CPU cycles/packet to identify which cycle counter is being used. Signed-off-by: Dharmik Thakkar Reviewed-by: Honnappa Nagarahalli Reviewed-by: Phil Yang --- v2: - Use %"PRIu64" instead of %lu - Fix checkpatch warning --- app/test-pmd/testpmd.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c index 99bacddbfdca..806abb805879 100644 --- a/app/test-pmd/testpmd.c +++ b/app/test-pmd/testpmd.c @@ -1953,11 +1953,14 @@ fwd_stats_display(void) "%s\n", acc_stats_border, acc_stats_border); #ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES +#define CYC_PER_MHZ 1E6 if (total_recv > 0) printf("\n CPU cycles/packet=%u (total cycles=" - "%"PRIu64" / total RX packets=%"PRIu64")\n", + "%"PRIu64" / total RX packets=%"PRIu64") at %"PRIu64 + " MHz Clock\n", (unsigned int)(fwd_cycles / total_recv), - fwd_cycles, total_recv); + fwd_cycles, total_recv, + (uint64_t)(rte_get_tsc_hz() / CYC_PER_MHZ)); #endif } -- 2.20.1