From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7814CC38A2A for ; Fri, 8 May 2020 22:38:53 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 37D132184D for ; Fri, 8 May 2020 22:38:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 37D132184D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EEB331DA00; Sat, 9 May 2020 00:38:40 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id C48DF1D9EA for ; Sat, 9 May 2020 00:38:36 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3C2BE11D4; Fri, 8 May 2020 15:38:36 -0700 (PDT) Received: from dp6132.usa.Arm.com (dp6132.usa.arm.com [10.118.91.150]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 36E6A3F68F; Fri, 8 May 2020 15:38:36 -0700 (PDT) From: Dharmik Thakkar To: John McNamara , Marko Kovacevic Cc: dev@dpdk.org, nd@arm.com, Dharmik Thakkar Date: Fri, 8 May 2020 22:38:29 +0000 Message-Id: <20200508223829.3228-5-dharmik.thakkar@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200508223829.3228-1-dharmik.thakkar@arm.com> References: <20200506215847.7628-1-dharmik.thakkar@arm.com> <20200508223829.3228-1-dharmik.thakkar@arm.com> Subject: [dpdk-dev] [PATCH v2 5/5] doc: add aarch64 generic counter section X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add a separate section for low-resolution generic counter for ARM64 profiling methods. Signed-off-by: Dharmik Thakkar Reviewed-by: Honnappa Nagarahalli Reviewed-by: Phil Yang Acked-by: Jerin Jacob --- v2: - Add Acked-by tag --- doc/guides/prog_guide/profile_app.rst | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/doc/guides/prog_guide/profile_app.rst b/doc/guides/prog_guide/profile_app.rst index a36ebef4db99..e5d0e9079e11 100644 --- a/doc/guides/prog_guide/profile_app.rst +++ b/doc/guides/prog_guide/profile_app.rst @@ -57,11 +57,16 @@ For more derails refer to the `ARM64 specific PMU events enumeration `_. -High-resolution cycle counter -~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Low-resolution generic counter +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The default ``cntvct_el0`` based ``rte_rdtsc()`` provides a portable means to -get a wall clock counter in user space. Typically it runs at <= 100MHz. +get a wall clock counter in user space. Typically it runs at a lower clock frequency than the CPU clock frequency. +Cycles counted using this method should be scaled to CPU clock frequency. + + +High-resolution cycle counter +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The alternative method to enable ``rte_rdtsc()`` for a high resolution wall clock counter is through the ARMv8 PMU subsystem. The PMU cycle counter runs -- 2.20.1