From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C806C433E2 for ; Fri, 4 Sep 2020 08:45:27 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 49D3B20791 for ; Fri, 4 Sep 2020 08:45:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 49D3B20791 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6D8FBDE0; Fri, 4 Sep 2020 10:45:26 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id AE6CA255 for ; Fri, 4 Sep 2020 10:45:24 +0200 (CEST) IronPort-SDR: M9fUFul/O60D61Zt+AnrZNMBfQeROednmoRFFp2TZ3uAL1wrQEZXR3O/V2bVoixupwxMrqZWDG 49P6HCzJUcwg== X-IronPort-AV: E=McAfee;i="6000,8403,9733"; a="145412892" X-IronPort-AV: E=Sophos;i="5.76,389,1592895600"; d="scan'208";a="145412892" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Sep 2020 01:45:23 -0700 IronPort-SDR: SNgOuYhUgBqsPsGkCsKnRfwqAbxgviJqPy1oy/sLlVBVv81YoAkgXzqM3XSpqJldV9r/iZTAOl vegLZdj3GqZA== X-IronPort-AV: E=Sophos;i="5.76,389,1592895600"; d="scan'208";a="447230468" Received: from bricha3-mobl.ger.corp.intel.com ([10.251.81.45]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 04 Sep 2020 01:45:21 -0700 Date: Fri, 4 Sep 2020 09:45:18 +0100 From: Bruce Richardson To: Honnappa Nagarahalli Cc: Ciara Power , "dev@dpdk.org" , Ray Kinsella , Neil Horman , nd Message-ID: <20200904084518.GA1627@bricha3-MOBL.ger.corp.intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200827161304.32300-1-ciara.power@intel.com> <20200827161304.32300-2-ciara.power@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [dpdk-dev] [PATCH v2 01/17] eal: add max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Fri, Sep 04, 2020 at 05:30:28AM +0000, Honnappa Nagarahalli wrote: > > > diff --git a/lib/librte_eal/include/rte_eal.h b/lib/librte_eal/include/rte_eal.h > > index ddcf6a2e7a..8148f650f2 100644 > > --- a/lib/librte_eal/include/rte_eal.h > > +++ b/lib/librte_eal/include/rte_eal.h > > @@ -43,6 +43,13 @@ enum rte_proc_type_t { > > RTE_PROC_INVALID > > }; > > > > +enum rte_max_simd_t { > We could add a RTE_MAX_SIMD = 0. Arm platforms can use this to choose SVE. > Is zero the best value for this? Would setting it to MAX_INT or some other big number be better, in terms of comparisons operations, or does that just not apply at all with SVE? > > + RTE_NO_SIMD = 64, > > + RTE_MAX_128_SIMD = 128, > > + RTE_MAX_256_SIMD = 256, > > + RTE_MAX_512_SIMD = 512 > > +}; > > +