From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BDC3C43457 for ; Wed, 14 Oct 2020 09:22:52 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id DA53720BED for ; Wed, 14 Oct 2020 09:22:51 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DA53720BED Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2CE081DD7F; Wed, 14 Oct 2020 11:21:37 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id C61D91DD7D for ; Wed, 14 Oct 2020 11:21:34 +0200 (CEST) IronPort-SDR: ZHjll1P5GZjGXVodHbqJsmq+MuHoMBUUf3O8VOcbh9AzcV1Up129R+FrWF5uCkUTczGKl3lc5K iJQWzWd7rn7w== X-IronPort-AV: E=McAfee;i="6000,8403,9773"; a="183585328" X-IronPort-AV: E=Sophos;i="5.77,374,1596524400"; d="scan'208";a="183585328" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2020 02:21:34 -0700 IronPort-SDR: jw6hnQ/qXQF9OS7/Gs0hYiqREIxHM7G2xNlpeaBgbvWyWqlUAScP23jUmQDls0mJw5j+z/KeIh rDKTpUjYPx2Q== X-IronPort-AV: E=Sophos;i="5.77,374,1596524400"; d="scan'208";a="530752329" Received: from intel-npg-odc-srv01.cd.intel.com ([10.240.178.136]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Oct 2020 02:21:31 -0700 From: SteveX Yang To: dev@dpdk.org Cc: jia.guo@intel.com, qiming.yang@intel.com, qi.z.zhang@intel.com, jingjing.wu@intel.com, beilei.xing@intel.com, konstantin.ananyev@intel.com, SteveX Yang Date: Wed, 14 Oct 2020 09:19:44 +0000 Message-Id: <20201014091945.1934-5-stevex.yang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201014091945.1934-1-stevex.yang@intel.com> References: <20200928065541.7520-1-stevex.yang@intel.com> <20201014091945.1934-1-stevex.yang@intel.com> Subject: [dpdk-dev] [PATCH v5 4/5] net/i40e: fix max mtu size packets with vlan tag cannot be received by default X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" when application presets the max rx packet length and expected mtu at the same time, driver need identify if the preset max frame size can hold mtu data and Ether overhead completely. if not, adjust the max frame size via mtu_set ops within dev_configure. Fixes: ff8282f4bbcd ("net/i40e: consider QinQ when setting MTU") Signed-off-by: SteveX Yang --- drivers/net/i40e/i40e_ethdev.c | 11 +++++++++++ drivers/net/i40e/i40e_ethdev_vf.c | 13 ++++++++++++- 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 943cfe71d..272cfc7ca 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -1911,6 +1911,7 @@ i40e_dev_configure(struct rte_eth_dev *dev) struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); enum rte_eth_rx_mq_mode mq_mode = dev->data->dev_conf.rxmode.mq_mode; + uint32_t frame_size = dev->data->mtu + I40E_ETH_OVERHEAD; int i, ret; ret = i40e_dev_sync_phy_type(hw); @@ -1925,6 +1926,16 @@ i40e_dev_configure(struct rte_eth_dev *dev) ad->tx_simple_allowed = true; ad->tx_vec_allowed = true; + /** + * Reset the max frame size via mtu_set ops if preset max frame + * cannot hold MTU data and Ether overhead. + */ + if (frame_size > dev->data->dev_conf.rxmode.max_rx_pkt_len) { + ret = i40e_dev_mtu_set(dev, dev->data->mtu); + if (ret != 0) + return ret; + } + if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c index 4d6510d1f..686f3c627 100644 --- a/drivers/net/i40e/i40e_ethdev_vf.c +++ b/drivers/net/i40e/i40e_ethdev_vf.c @@ -1664,6 +1664,8 @@ i40evf_dev_configure(struct rte_eth_dev *dev) I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, dev->data->nb_tx_queues); + uint32_t frame_size = dev->data->mtu + I40E_ETH_OVERHEAD; + int ret; /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk * allocation or vector Rx preconditions we will reset it. @@ -1676,9 +1678,18 @@ i40evf_dev_configure(struct rte_eth_dev *dev) dev->data->dev_conf.intr_conf.lsc = !!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC); + /** + * Reset the max frame size via mtu_set ops if preset max frame + * cannot hold MTU data and Ether overhead. + */ + if (frame_size > dev->data->dev_conf.rxmode.max_rx_pkt_len) { + ret = i40evf_dev_mtu_set(dev, dev->data->mtu); + if (ret != 0) + return ret; + } + if (num_queue_pairs > vf->vsi_res->num_queue_pairs) { struct i40e_hw *hw; - int ret; if (rte_eal_process_type() != RTE_PROC_PRIMARY) { PMD_DRV_LOG(ERR, -- 2.17.1