From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7934AC433E7 for ; Thu, 15 Oct 2020 10:42:18 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id ECCF621D7F for ; Thu, 15 Oct 2020 10:42:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ECCF621D7F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1BF0A1DF94; Thu, 15 Oct 2020 12:38:50 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 354DE1DEF2 for ; Thu, 15 Oct 2020 12:38:48 +0200 (CEST) IronPort-SDR: u5DSwItd9f459Jp51OQSc7hbT7JmCMzns38KiriNNuFWb4VcyEppWhqu+4O+zZzhYbA0hiZ6Lb pAohOnoCYRzg== X-IronPort-AV: E=McAfee;i="6000,8403,9774"; a="227964269" X-IronPort-AV: E=Sophos;i="5.77,378,1596524400"; d="scan'208";a="227964269" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Oct 2020 03:38:47 -0700 IronPort-SDR: lwofzGUGb+v02yqlHeURopKq7Yi59M117fpz8cm9R/oNWWmHinCPVOAvl0ZXg8z37dSrJmLWMO H38V101X0C/A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,378,1596524400"; d="scan'208";a="520728560" Received: from silpixa00400355.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.239]) by fmsmga006.fm.intel.com with ESMTP; 15 Oct 2020 03:38:44 -0700 From: Ciara Power To: dev@dpdk.org Cc: viktorin@rehivetech.com, ruifeng.wang@arm.com, jerinj@marvell.com, drc@linux.vnet.ibm.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, Ciara Power , Matan Azrad , Shahaf Shuler , Viacheslav Ovsiienko , Viacheslav Ovsiienko , Matan Azrad , Shahaf Shuler Date: Thu, 15 Oct 2020 11:38:07 +0100 Message-Id: <20201015103814.253636-12-ciara.power@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20201015103814.253636-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20201015103814.253636-1-ciara.power@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v6 11/18] net/mlx5: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Matan Azrad Cc: Shahaf Shuler Cc: Viacheslav Ovsiienko Signed-off-by: Ciara Power Acked-by: Viacheslav Ovsiienko --- v4: Updated enum name. v2: Moved check for max bitwidth into existing check vec support function. --- drivers/net/mlx5/mlx5_rxtx_vec.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/mlx5/mlx5_rxtx_vec.c b/drivers/net/mlx5/mlx5_rxtx_vec.c index 711dcd35fa..49f1b61ff8 100644 --- a/drivers/net/mlx5/mlx5_rxtx_vec.c +++ b/drivers/net/mlx5/mlx5_rxtx_vec.c @@ -148,6 +148,8 @@ mlx5_check_vec_rx_support(struct rte_eth_dev *dev) struct mlx5_priv *priv = dev->data->dev_private; uint32_t i; + if (rte_get_max_simd_bitwidth() < RTE_SIMD_128) + return -ENOTSUP; if (!priv->config.rx_vec_en) return -ENOTSUP; if (mlx5_mprq_enabled(dev)) -- 2.22.0