From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66345C433E6 for ; Mon, 11 Jan 2021 18:22:25 +0000 (UTC) Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by mail.kernel.org (Postfix) with ESMTP id F0AA12250E for ; Mon, 11 Jan 2021 18:22:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F0AA12250E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 469B6140FE0; Mon, 11 Jan 2021 19:22:12 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by mails.dpdk.org (Postfix) with ESMTP id EADD4140FD5 for ; Mon, 11 Jan 2021 19:22:07 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from shirik@nvidia.com) with SMTP; 11 Jan 2021 20:22:07 +0200 Received: from nvidia.com (c-141-254-1-005.mtl.labs.mlnx [10.141.254.5]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 10BIM0fU011077; Mon, 11 Jan 2021 20:22:06 +0200 From: Shiri Kuzin To: dev@dpdk.org Cc: viacheslavo@nvidia.com, andrew.rybchenko@oktetlabs.ru, olivier.matz@6wind.com, orika@nvidia.com, ferruh.yigit@intel.com, thomas@monjalon.net, rasland@nvidia.com Date: Mon, 11 Jan 2021 20:21:50 +0200 Message-Id: <20210111182153.9972-4-shirik@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20210111182153.9972-1-shirik@nvidia.com> References: <20201228194432.30512-1-shirik@nvidia.com> <20210111182153.9972-1-shirik@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v2 3/6] common/mlx5: add matcher fields for GTP extensions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This is a preparation step to support GTP extension header. In this patch we add the matcher fields that will be used to match on the GTP extension header. Signed-off-by: Shiri Kuzin Acked-by: Viacheslav Ovsiienko --- drivers/common/mlx5/mlx5_prm.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index 8c9b53ce10..8a82c4f5ec 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -793,7 +793,12 @@ struct mlx5_ifc_fte_match_set_misc3_bits { u8 gtpu_teid[0x20]; u8 gtpu_msg_type[0x08]; u8 gtpu_msg_flags[0x08]; - u8 reserved_at_170[0x90]; + u8 reserved_at_170[0x10]; + u8 gtpu_dw_2[0x20]; + u8 gtpu_first_ext_dw_0[0x20]; + u8 gtpu_dw_0[0x20]; + u8 reserved_at_240[0x20]; + }; struct mlx5_ifc_fte_match_set_misc4_bits { -- 2.21.0