From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 847CAC433ED for ; Wed, 21 Apr 2021 02:17:25 +0000 (UTC) Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by mail.kernel.org (Postfix) with ESMTP id F36C4613FA for ; Wed, 21 Apr 2021 02:17:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F36C4613FA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CE70E418AA; Wed, 21 Apr 2021 04:17:23 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 4D70041385 for ; Wed, 21 Apr 2021 04:17:22 +0200 (CEST) IronPort-SDR: rGXzMUHY99uREKdB9TXN4/jzaFwhr7rkJhJG6IXbZHUwN9AaPrF5bu2vlxFClhOG0peOQGYCQr WxEJSMb4JNvg== X-IronPort-AV: E=McAfee;i="6200,9189,9960"; a="256939529" X-IronPort-AV: E=Sophos;i="5.82,238,1613462400"; d="scan'208";a="256939529" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Apr 2021 19:17:21 -0700 IronPort-SDR: tojVDdP5jg83UPLmEyoo3Bdp5GkqDNI4g3mGjabOaYSBksBddJH/FsKJfwJP+SxqdvOQTnh2qW L2hHnsmDm8Wg== X-IronPort-AV: E=Sophos;i="5.82,238,1613462400"; d="scan'208";a="427332327" Received: from unknown (HELO intel-npg-odc-srv02.cd.intel.com) ([10.240.178.186]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Apr 2021 19:17:18 -0700 From: Murphy Yang To: dev@dpdk.org Cc: qiming.yang@intel.com, jia.guo@intel.com, beilei.xing@intel.com, stevex.yang@intel.com, robinx.zhang@intel.com, Murphy Yang Date: Wed, 21 Apr 2021 02:08:30 +0000 Message-Id: <20210421020830.4989-1-murphyx.yang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210416021955.9790-1-murphyx.yang@intel.com> References: <20210416021955.9790-1-murphyx.yang@intel.com> Subject: [dpdk-dev] [PATCH v2] net/i40e: fix FDIR issue for common PCTYPEs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Currently, FDIR doesn't work for all common PCTYPEs, the root cause is that input set is not configured. Fixes: 4a072ad43442 ("net/i40e: fix flow director config after flow validate") Signed-off-by: Murphy Yang --- v2: - tune the code and modify commit message drivers/net/i40e/i40e_fdir.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c index da089baa4d..6b81e09db5 100644 --- a/drivers/net/i40e/i40e_fdir.c +++ b/drivers/net/i40e/i40e_fdir.c @@ -1607,8 +1607,10 @@ i40e_flow_set_fdir_inset(struct i40e_pf *pf, /* Check if the configuration is conflicted */ if (pf->fdir.inset_flag[pctype] && - memcmp(&pf->fdir.input_set[pctype], &input_set, sizeof(uint64_t))) - return -1; + memcmp(&pf->fdir.input_set[pctype], &input_set, sizeof(uint64_t))) { + PMD_DRV_LOG(ERR, "Conflict with the first rule's input set."); + return -EINVAL; + } if (pf->fdir.inset_flag[pctype] && !memcmp(&pf->fdir.input_set[pctype], &input_set, sizeof(uint64_t))) @@ -1762,18 +1764,21 @@ i40e_flow_add_del_fdir_filter(struct rte_eth_dev *dev, i40e_fdir_filter_convert(filter, &check_filter); if (add) { - if (filter->input.flow_ext.is_flex_flow) { + /* configure the input set for common PCTYPEs*/ + if (!filter->input.flow_ext.customized_pctype) { ret = i40e_flow_set_fdir_inset(pf, pctype, filter->input.flow_ext.input_set); if (ret == -1) { PMD_DRV_LOG(ERR, "Conflict with the" - " first rule's input set."); + " first rule's input set."); return -EINVAL; } else if (ret == -EINVAL) { PMD_DRV_LOG(ERR, "Invalid pattern mask."); return -EINVAL; } + } + if (filter->input.flow_ext.is_flex_flow) { for (i = 0; i < filter->input.flow_ext.raw_id; i++) { layer_idx = filter->input.flow_ext.layer_idx; field_idx = layer_idx * I40E_MAX_FLXPLD_FIED + i; -- 2.17.1