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[204.195.96.226]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8795168ca9sm336649066b.15.2026.01.16.13.17.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jan 2026 13:17:14 -0800 (PST) From: Stephen Hemminger To: dev@dpdk.org Cc: Stephen Hemminger Subject: [PATCH 10/11] doc: correct typos in enabling functionality guide Date: Fri, 16 Jan 2026 13:06:26 -0800 Message-ID: <20260116211649.104776-11-stephen@networkplumber.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260116211649.104776-1-stephen@networkplumber.org> References: <20260116211649.104776-1-stephen@networkplumber.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Remove space before hyphen in "frequency-based". Change "can not" to "cannot" (one word). Change "my" to "may" (typo). Signed-off-by: Stephen Hemminger --- doc/guides/linux_gsg/enable_func.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/doc/guides/linux_gsg/enable_func.rst b/doc/guides/linux_gsg/enable_func.rst index a551ddebec..4e1a939f35 100644 --- a/doc/guides/linux_gsg/enable_func.rst +++ b/doc/guides/linux_gsg/enable_func.rst @@ -104,7 +104,7 @@ Power Management and Power Saving Functionality ----------------------------------------------- Enhanced Intel SpeedStep\ |reg| Technology must be enabled in the platform BIOS if the power management feature of DPDK is to be used. -Otherwise, the sys file folder ``/sys/devices/system/cpu/cpu0/cpufreq`` will not exist, and the CPU frequency- based power management cannot be used. +Otherwise, the sys file folder ``/sys/devices/system/cpu/cpu0/cpufreq`` will not exist, and the CPU frequency-based power management cannot be used. Consult the relevant BIOS documentation to determine how these settings can be accessed. For example, on some Intel reference platform BIOS variants, the path to Enhanced Intel SpeedStep\ |reg| Technology is:: @@ -134,7 +134,7 @@ to isolate them from the general Linux scheduler tasks. .. note:: It is not recommended to use CPU core 0 for DPDK polling applications - because it can not be truly isolated from other system and kernel activity. + because it cannot be truly isolated from other system and kernel activity. For example, if a given CPU has 0-7 cores and DPDK applications are to run on logical cores 2, 4 and 6, @@ -173,7 +173,7 @@ To enable HPET support in DPDK: #. Ensure that HPET is enabled in BIOS settings. #. Enable ``HPET_MMAP`` support in kernel configuration. - Note that this my involve doing a kernel rebuild, + Note that this may involve doing a kernel rebuild, as many common linux distributions do *not* have this setting enabled by default in their kernel builds. #. Enable DPDK support for HPET by using the build-time meson option ``use_hpet``, -- 2.51.0