[PATCH v1 2/5] net/zxdh: optimize alloc queue resources

Junlong Wang
2025-12-20T06:36:09Z

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optimized alloc queue resources,
alloc queue resources during a hardware lock get and release period.

Signed-off-by: Junlong Wang <wang.junlong1@zte.com.cn>
---
drivers/net/zxdh/zxdh_common.c | 75 ++++++----------------------------
drivers/net/zxdh/zxdh_common.h | 2 +-
drivers/net/zxdh/zxdh_ethdev.c | 24 +++++++----
drivers/net/zxdh/zxdh_pci.h | 2 +
4 files changed, 31 insertions(+), 72 deletions(-)

diff --git a/drivers/net/zxdh/zxdh_common.c b/drivers/net/zxdh/zxdh_common.c
index ce53ee8a05..ffc00ab3e6 100644
--- a/drivers/net/zxdh/zxdh_common.c
+++ b/drivers/net/zxdh/zxdh_common.c
@@ -354,76 +354,25 @@ zxdh_write_comm_reg(uint64_t pci_comm_cfg_baseaddr, uint32_t reg, uint32_t val)
*((volatile uint32_t *)(pci_comm_cfg_baseaddr + reg)) = val;
}

-static int32_t
-zxdh_common_table_write(struct zxdh_hw *hw, uint8_t field,
- void *buff, uint16_t buff_size)
-{
- struct zxdh_pci_bar_msg desc;
- struct zxdh_msg_recviver_mem msg_rsp;
- int32_t ret = 0;
-
- if (!hw->msg_chan_init) {
- PMD_DRV_LOG(ERR, "Bar messages channel not initialized");
- return -1;
- }
- if (buff_size != 0 && buff == NULL) {
- PMD_DRV_LOG(ERR, "Buff is invalid");
- return -1;
- }
-
- ret = zxdh_fill_common_msg(hw, &desc, ZXDH_COMMON_TABLE_WRITE,
- field, buff, buff_size);
-
- if (ret != 0) {
- PMD_DRV_LOG(ERR, "Failed to fill common msg");
- return ret;
- }
-
- ret = zxdh_send_command(hw, &desc, ZXDH_BAR_MODULE_TBL, &msg_rsp);
- if (ret != 0)
- goto free_msg_data;
-
- ret = zxdh_common_rsp_check(&msg_rsp, NULL, 0);
- if (ret != 0)
- goto free_rsp_data;
-
-free_rsp_data:
- rte_free(msg_rsp.recv_buffer);
-free_msg_data:
- rte_free(desc.payload_addr);
- return ret;
-}
-
int32_t
-zxdh_datach_set(struct rte_eth_dev *dev)
+zxdh_datach_set(struct rte_eth_dev *dev, uint16_t ph_chno)
{
struct zxdh_hw *hw = dev->data->dev_private;
- uint16_t nr_vq = hw->rx_qnum + hw->tx_qnum;
- uint16_t buff_size = (nr_vq % ZXDH_QUEUES_NUM_MAX + 1) * sizeof(uint16_t);
- int ret = 0;
- uint16_t *pdata, i;
-
- void *buff = rte_zmalloc(NULL, buff_size, 0);
+ uint64_t addr = 0;
+ uint64_t pcieid_addr = 0;

- if (unlikely(buff == NULL)) {
- PMD_DRV_LOG(ERR, "Failed to allocate buff");
+ if ((ph_chno) >= ZXDH_QUEUES_PCIEID_SIZE) {
+ PMD_DRV_LOG(ERR, "ph_chno is greater than %08x", ph_chno);
return -ENOMEM;
}

- pdata = (uint16_t *)buff;
- *pdata++ = nr_vq;
- for (i = 0; i < hw->rx_qnum; i++)
- *(pdata + i) = hw->channel_context[i * 2].ph_chno;
- for (i = 0; i < hw->tx_qnum; i++)
- *(pdata + hw->rx_qnum + i) = hw->channel_context[i * 2 + 1].ph_chno;
- ret = zxdh_common_table_write(hw, ZXDH_COMMON_FIELD_DATACH, (void *)buff, buff_size);
-
- if (ret != 0)
- PMD_DRV_LOG(ERR, "Failed to setup data channel of common table. code:%d", ret);
- hw->queue_set_flag = 1;
- rte_free(buff);
-
- return ret;
+ pcieid_addr =
+ *((volatile uint64_t *)(hw->bar_addr[ZXDH_BAR0_INDEX] + ZXDH_QUEUES_PCIEID_ADDR));
+ addr = hw->bar_addr[ZXDH_BAR0_INDEX] + pcieid_addr + (ph_chno << 1);
+ *((volatile uint16_t *)(addr)) = hw->pcie_id;
+ PMD_DRV_LOG(DEBUG, "addr %lx pcie_id %04x, pcieid_addr %lx lch %d",
+ addr, hw->pcie_id, pcieid_addr, ph_chno);
+ return 0;
}

bool
diff --git a/drivers/net/zxdh/zxdh_common.h b/drivers/net/zxdh/zxdh_common.h
index 6d78ae0273..bbc6bed1df 100644
--- a/drivers/net/zxdh/zxdh_common.h
+++ b/drivers/net/zxdh/zxdh_common.h
@@ -125,7 +125,7 @@ void zxdh_release_lock(struct zxdh_hw *hw);
int32_t zxdh_timedlock(struct zxdh_hw *hw, uint32_t us);
uint32_t zxdh_read_comm_reg(uint64_t pci_comm_cfg_baseaddr, uint32_t reg);
void zxdh_write_comm_reg(uint64_t pci_comm_cfg_baseaddr, uint32_t reg, uint32_t val);
-int32_t zxdh_datach_set(struct rte_eth_dev *dev);
+int32_t zxdh_datach_set(struct rte_eth_dev *dev, uint16_t ph_chno);

bool zxdh_rx_offload_enabled(struct zxdh_hw *hw);
bool zxdh_tx_offload_enabled(struct zxdh_hw *hw);
diff --git a/drivers/net/zxdh/zxdh_ethdev.c b/drivers/net/zxdh/zxdh_ethdev.c
index 80b992d4ad..2fc2d78aff 100644
--- a/drivers/net/zxdh/zxdh_ethdev.c
+++ b/drivers/net/zxdh/zxdh_ethdev.c
@@ -520,6 +520,9 @@ zxdh_get_available_channel(struct rte_eth_dev *dev, uint8_t queue_type)
uint32_t res_bit = (total_queue_num + inval_bit) % 32;
uint32_t vq_reg_num = (total_queue_num + inval_bit) / 32 + (res_bit ? 1 : 0);
int32_t ret = 0;
+ uint32_t addr = 0;
+ uint32_t var = 0;
+ int32_t ph_chno = 0;

ret = zxdh_timedlock(hw, 1000);
if (ret) {
@@ -528,15 +531,14 @@ zxdh_get_available_channel(struct rte_eth_dev *dev, uint8_t queue_type)
}

for (phy_vq_reg = 0; phy_vq_reg < vq_reg_num; phy_vq_reg++) {
- uint32_t addr = ZXDH_QUERES_SHARE_BASE +
- (phy_vq_reg + phy_vq_reg_oft) * sizeof(uint32_t);
- uint32_t var = zxdh_read_bar_reg(dev, ZXDH_BAR0_INDEX, addr);
+ addr = ZXDH_QUERES_SHARE_BASE +
+ (phy_vq_reg + phy_vq_reg_oft) * sizeof(uint32_t);
+ var = zxdh_read_bar_reg(dev, ZXDH_BAR0_INDEX, addr);
if (phy_vq_reg == 0) {
for (j = (inval_bit + base); j < 32; j += 2) {
/* Got the available channel & update COI table */
if ((var & (1 << j)) == 0) {
var |= (1 << j);
- zxdh_write_bar_reg(dev, ZXDH_BAR0_INDEX, addr, var);
done = 1;
break;
}
@@ -548,7 +550,6 @@ zxdh_get_available_channel(struct rte_eth_dev *dev, uint8_t queue_type)
/* Got the available channel & update COI table */
if ((var & (1 << j)) == 0) {
var |= (1 << j);
- zxdh_write_bar_reg(dev, ZXDH_BAR0_INDEX, addr, var);
done = 1;
break;
}
@@ -560,7 +561,6 @@ zxdh_get_available_channel(struct rte_eth_dev *dev, uint8_t queue_type)
/* Got the available channel & update COI table */
if ((var & (1 << j)) == 0) {
var |= (1 << j);
- zxdh_write_bar_reg(dev, ZXDH_BAR0_INDEX, addr, var);
done = 1;
break;
}
@@ -570,6 +570,16 @@ zxdh_get_available_channel(struct rte_eth_dev *dev, uint8_t queue_type)
}
}

+ if (done) {
+ ph_chno = (phy_vq_reg + phy_vq_reg_oft) * 32 + j;
+ if (zxdh_datach_set(dev, ph_chno) != 0) {
+ zxdh_release_lock(hw);
+ PMD_DRV_LOG(ERR, "zxdh_datach_set queue pcie addr failed");
+ return -1;
+ }
+ zxdh_write_bar_reg(dev, ZXDH_BAR0_INDEX, addr, var);
+ }
+
zxdh_release_lock(hw);
/* check for no channel condition */
if (done != 1) {
@@ -1333,8 +1343,6 @@ static int32_t zxdh_reconfig_queues(struct rte_eth_dev *dev)
if (ret < 0)
return ret;

- zxdh_datach_set(dev);
-
if (zxdh_configure_intr(dev) < 0) {
PMD_DRV_LOG(ERR, "Failed to configure interrupt");
zxdh_free_queues(dev);
diff --git a/drivers/net/zxdh/zxdh_pci.h b/drivers/net/zxdh/zxdh_pci.h
index a1834f6615..d0f4ff6398 100644
--- a/drivers/net/zxdh/zxdh_pci.h
+++ b/drivers/net/zxdh/zxdh_pci.h
@@ -65,6 +65,8 @@ enum zxdh_msix_status {
#define ZXDH_CONFIG_STATUS_DEV_NEED_RESET 0x40
#define ZXDH_CONFIG_STATUS_FAILED 0x80
#define ZXDH_PCI_QUEUE_ADDR_SHIFT 12
+#define ZXDH_QUEUES_PCIEID_ADDR 0x1BF8
+#define ZXDH_QUEUES_PCIEID_SIZE 4096

struct __rte_packed_begin zxdh_net_config {
/* The config defining mac address (if ZXDH_NET_F_MAC) */
--
2.27.0

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