From: Bruce Richardson <bruce.richardson@intel.com>
To: dev@dpdk.org
Cc: Bruce Richardson <bruce.richardson@intel.com>,
Anatoly Burakov <anatoly.burakov@intel.com>
Subject: [PATCH v4 29/35] net/intel: consolidate ice and i40e buffer free function
Date: Mon, 9 Feb 2026 16:45:27 +0000 [thread overview]
Message-ID: <20260209164538.1428499-30-bruce.richardson@intel.com> (raw)
In-Reply-To: <20260209164538.1428499-1-bruce.richardson@intel.com>
The buffer freeing function for the simple scalar Tx path is almost
identical in both ice and i40e drivers, except that the i40e has
batching for the FAST_FREE case. Consolidate both functions into a
common one based off the better i40e version.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/intel/common/tx.h | 3 ++
drivers/net/intel/common/tx_scalar.h | 58 +++++++++++++++++++++++++
drivers/net/intel/i40e/i40e_rxtx.c | 63 +---------------------------
drivers/net/intel/ice/ice_rxtx.c | 45 +-------------------
4 files changed, 65 insertions(+), 104 deletions(-)
diff --git a/drivers/net/intel/common/tx.h b/drivers/net/intel/common/tx.h
index ef6d543e7a..67378a0803 100644
--- a/drivers/net/intel/common/tx.h
+++ b/drivers/net/intel/common/tx.h
@@ -66,6 +66,9 @@ enum ci_tx_l2tag1_field {
/* Common TX maximum burst size for chunked transmission in simple paths */
#define CI_TX_MAX_BURST 32
+/* Common TX maximum free buffer size for batched bulk freeing */
+#define CI_TX_MAX_FREE_BUF_SZ 64
+
/* Common TX descriptor command flags for simple transmit */
#define CI_TX_DESC_CMD_DEFAULT (CI_TX_DESC_CMD_ICRC | CI_TX_DESC_CMD_EOP)
diff --git a/drivers/net/intel/common/tx_scalar.h b/drivers/net/intel/common/tx_scalar.h
index ef6069efbf..f0e7b4664b 100644
--- a/drivers/net/intel/common/tx_scalar.h
+++ b/drivers/net/intel/common/tx_scalar.h
@@ -72,6 +72,64 @@ ci_tx_fill_hw_ring(struct ci_tx_queue *txq, struct rte_mbuf **pkts,
}
}
+/* Free transmitted mbufs from descriptor ring with bulk freeing for Tx simple path */
+static __rte_always_inline int
+ci_tx_free_bufs(struct ci_tx_queue *txq)
+{
+ const uint16_t rs_thresh = txq->tx_rs_thresh;
+ const uint16_t k = RTE_ALIGN_FLOOR(rs_thresh, CI_TX_MAX_FREE_BUF_SZ);
+ const uint16_t m = rs_thresh % CI_TX_MAX_FREE_BUF_SZ;
+ struct rte_mbuf *free[CI_TX_MAX_FREE_BUF_SZ];
+ struct ci_tx_entry *txep;
+
+ if ((txq->ci_tx_ring[txq->tx_next_dd].cmd_type_offset_bsz &
+ rte_cpu_to_le_64(CI_TXD_QW1_DTYPE_M)) !=
+ rte_cpu_to_le_64(CI_TX_DESC_DTYPE_DESC_DONE))
+ return 0;
+
+ txep = &txq->sw_ring[txq->tx_next_dd - (rs_thresh - 1)];
+
+ struct rte_mempool *fast_free_mp =
+ likely(txq->fast_free_mp != (void *)UINTPTR_MAX) ?
+ txq->fast_free_mp :
+ (txq->fast_free_mp = txep[0].mbuf->pool);
+
+ if (fast_free_mp) {
+ if (k) {
+ for (uint16_t j = 0; j != k; j += CI_TX_MAX_FREE_BUF_SZ) {
+ for (uint16_t i = 0; i < CI_TX_MAX_FREE_BUF_SZ; ++i, ++txep) {
+ free[i] = txep->mbuf;
+ txep->mbuf = NULL;
+ }
+ rte_mbuf_raw_free_bulk(fast_free_mp, free, CI_TX_MAX_FREE_BUF_SZ);
+ }
+ }
+
+ if (m) {
+ for (uint16_t i = 0; i < m; ++i, ++txep) {
+ free[i] = txep->mbuf;
+ txep->mbuf = NULL;
+ }
+ rte_mbuf_raw_free_bulk(fast_free_mp, free, m);
+ }
+ } else {
+ for (uint16_t i = 0; i < rs_thresh; ++i, ++txep)
+ rte_prefetch0((txep + i)->mbuf);
+
+ for (uint16_t i = 0; i < rs_thresh; ++i, ++txep) {
+ rte_pktmbuf_free_seg(txep->mbuf);
+ txep->mbuf = NULL;
+ }
+ }
+
+ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + rs_thresh);
+ txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + rs_thresh);
+ if (txq->tx_next_dd >= txq->nb_tx_desc)
+ txq->tx_next_dd = (uint16_t)(rs_thresh - 1);
+
+ return rs_thresh;
+}
+
/*
* Common transmit descriptor cleanup function for Intel drivers.
*
diff --git a/drivers/net/intel/i40e/i40e_rxtx.c b/drivers/net/intel/i40e/i40e_rxtx.c
index 174d517e9d..6b8d9fd70e 100644
--- a/drivers/net/intel/i40e/i40e_rxtx.c
+++ b/drivers/net/intel/i40e/i40e_rxtx.c
@@ -1010,65 +1010,6 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
get_context_desc, NULL, NULL);
}
-static __rte_always_inline int
-i40e_tx_free_bufs(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry *txep;
- const uint16_t tx_rs_thresh = txq->tx_rs_thresh;
- uint16_t i, j;
- struct rte_mbuf *free[I40E_TX_MAX_FREE_BUF_SZ];
- const uint16_t k = RTE_ALIGN_FLOOR(tx_rs_thresh, I40E_TX_MAX_FREE_BUF_SZ);
- const uint16_t m = tx_rs_thresh % I40E_TX_MAX_FREE_BUF_SZ;
-
- if ((txq->ci_tx_ring[txq->tx_next_dd].cmd_type_offset_bsz &
- rte_cpu_to_le_64(CI_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(CI_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- txep = &txq->sw_ring[txq->tx_next_dd - (tx_rs_thresh - 1)];
-
- struct rte_mempool *fast_free_mp =
- likely(txq->fast_free_mp != (void *)UINTPTR_MAX) ?
- txq->fast_free_mp :
- (txq->fast_free_mp = txep[0].mbuf->pool);
-
- if (fast_free_mp != NULL) {
- if (k) {
- for (j = 0; j != k; j += I40E_TX_MAX_FREE_BUF_SZ) {
- for (i = 0; i < I40E_TX_MAX_FREE_BUF_SZ; ++i, ++txep) {
- free[i] = txep->mbuf;
- txep->mbuf = NULL;
- }
- rte_mbuf_raw_free_bulk(fast_free_mp, free,
- I40E_TX_MAX_FREE_BUF_SZ);
- }
- }
-
- if (m) {
- for (i = 0; i < m; ++i, ++txep) {
- free[i] = txep->mbuf;
- txep->mbuf = NULL;
- }
- rte_mbuf_raw_free_bulk(fast_free_mp, free, m);
- }
- } else {
- for (i = 0; i < tx_rs_thresh; i++)
- rte_prefetch0((txep + i)->mbuf);
-
- for (i = 0; i < tx_rs_thresh; ++i, ++txep) {
- rte_pktmbuf_free_seg(txep->mbuf);
- txep->mbuf = NULL;
- }
- }
-
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(tx_rs_thresh - 1);
-
- return tx_rs_thresh;
-}
-
static inline uint16_t
tx_xmit_pkts(struct ci_tx_queue *txq,
struct rte_mbuf **tx_pkts,
@@ -1083,7 +1024,7 @@ tx_xmit_pkts(struct ci_tx_queue *txq,
* descriptor, free the associated buffer.
*/
if (txq->nb_tx_free < txq->tx_free_thresh)
- i40e_tx_free_bufs(txq);
+ ci_tx_free_bufs(txq);
/* Use available descriptor only */
nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
@@ -2508,7 +2449,7 @@ i40e_tx_done_cleanup_simple(struct ci_tx_queue *txq,
if (txq->nb_tx_desc - txq->nb_tx_free < txq->tx_rs_thresh)
break;
- n = i40e_tx_free_bufs(txq);
+ n = ci_tx_free_bufs(txq);
if (n == 0)
break;
diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c
index e4fba453a9..a3a94033bf 100644
--- a/drivers/net/intel/ice/ice_rxtx.c
+++ b/drivers/net/intel/ice/ice_rxtx.c
@@ -3129,47 +3129,6 @@ ice_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
return ci_xmit_pkts(txq, tx_pkts, nb_pkts, CI_VLAN_IN_L2TAG1, get_context_desc, NULL, NULL);
}
-static __rte_always_inline int
-ice_tx_free_bufs(struct ci_tx_queue *txq)
-{
- struct ci_tx_entry *txep;
- uint16_t i;
-
- if ((txq->ci_tx_ring[txq->tx_next_dd].cmd_type_offset_bsz &
- rte_cpu_to_le_64(CI_TXD_QW1_DTYPE_M)) !=
- rte_cpu_to_le_64(CI_TX_DESC_DTYPE_DESC_DONE))
- return 0;
-
- txep = &txq->sw_ring[txq->tx_next_dd - (txq->tx_rs_thresh - 1)];
-
- struct rte_mempool *fast_free_mp =
- likely(txq->fast_free_mp != (void *)UINTPTR_MAX) ?
- txq->fast_free_mp :
- (txq->fast_free_mp = txep[0].mbuf->pool);
-
- if (fast_free_mp != NULL) {
- for (i = 0; i < txq->tx_rs_thresh; ++i, ++txep) {
- rte_mempool_put(fast_free_mp, txep->mbuf);
- txep->mbuf = NULL;
- }
- } else {
- for (i = 0; i < txq->tx_rs_thresh; i++)
- rte_prefetch0((txep + i)->mbuf);
-
- for (i = 0; i < txq->tx_rs_thresh; ++i, ++txep) {
- rte_pktmbuf_free_seg(txep->mbuf);
- txep->mbuf = NULL;
- }
- }
-
- txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);
- txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);
- if (txq->tx_next_dd >= txq->nb_tx_desc)
- txq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);
-
- return txq->tx_rs_thresh;
-}
-
static int
ice_tx_done_cleanup_full(struct ci_tx_queue *txq,
uint32_t free_cnt)
@@ -3259,7 +3218,7 @@ ice_tx_done_cleanup_simple(struct ci_tx_queue *txq,
if (txq->nb_tx_desc - txq->nb_tx_free < txq->tx_rs_thresh)
break;
- n = ice_tx_free_bufs(txq);
+ n = ci_tx_free_bufs(txq);
if (n == 0)
break;
@@ -3300,7 +3259,7 @@ tx_xmit_pkts(struct ci_tx_queue *txq,
* descriptor, free the associated buffer.
*/
if (txq->nb_tx_free < txq->tx_free_thresh)
- ice_tx_free_bufs(txq);
+ ci_tx_free_bufs(txq);
/* Use available descriptor only */
nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
--
2.51.0
next prev parent reply other threads:[~2026-02-09 16:49 UTC|newest]
Thread overview: 274+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-19 17:25 [RFC PATCH 00/27] combine multiple Intel scalar Tx paths Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 01/27] net/intel: create common Tx descriptor structure Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 02/27] net/intel: use common tx ring structure Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 03/27] net/intel: create common post-Tx cleanup function Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 04/27] net/intel: consolidate definitions for Tx desc fields Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 05/27] net/intel: create separate header for Tx scalar fns Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 06/27] net/intel: add common fn to calculate needed descriptors Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 07/27] net/ice: refactor context descriptor handling Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 08/27] net/i40e: " Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 09/27] net/idpf: " Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 10/27] net/intel: consolidate checksum mask definition Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 11/27] net/intel: create common checksum Tx offload function Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 12/27] net/intel: create a common scalar Tx function Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 13/27] net/i40e: use " Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 14/27] net/intel: add IPSec hooks to common " Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 15/27] net/intel: support configurable VLAN tag insertion on Tx Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 16/27] net/iavf: use common scalar Tx function Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 17/27] net/i40e: document requirement for QinQ support Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 18/27] net/idpf: use common scalar Tx function Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 19/27] net/intel: avoid writing the final pkt descriptor twice Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 20/27] net/intel: write descriptors using non-volatile pointers Bruce Richardson
2025-12-20 8:43 ` Morten Brørup
2025-12-22 9:50 ` Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 21/27] net/intel: remove unnecessary flag clearing Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 22/27] net/intel: mark mid-burst ring cleanup as unlikely Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 23/27] net/intel: add special handling for single desc packets Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 24/27] net/intel: use separate array for desc status tracking Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 25/27] net/ixgbe: " Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 26/27] net/intel: drop unused Tx queue used count Bruce Richardson
2025-12-19 17:25 ` [RFC PATCH 27/27] net/intel: remove index for tracking end of packet Bruce Richardson
2025-12-20 9:05 ` Morten Brørup
2026-01-13 15:14 ` [PATCH v2 00/36] combine multiple Intel scalar Tx paths Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 01/36] net/intel: create common Tx descriptor structure Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 02/36] net/intel: use common Tx ring structure Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 03/36] net/intel: create common post-Tx cleanup function Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 04/36] net/intel: consolidate definitions for Tx desc fields Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 05/36] net/intel: create separate header for Tx scalar fns Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 06/36] net/intel: add common fn to calculate needed descriptors Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 07/36] net/ice: refactor context descriptor handling Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 08/36] net/i40e: " Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 09/36] net/idpf: " Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 10/36] net/intel: consolidate checksum mask definition Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 11/36] net/intel: create common checksum Tx offload function Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 12/36] net/intel: create a common scalar Tx function Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 13/36] net/i40e: use " Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 14/36] net/intel: add IPsec hooks to common " Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 15/36] net/intel: support configurable VLAN tag insertion on Tx Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 16/36] net/iavf: use common scalar Tx function Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 17/36] net/i40e: document requirement for QinQ support Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 18/36] net/idpf: use common scalar Tx function Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 19/36] net/intel: avoid writing the final pkt descriptor twice Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 20/36] eal: add macro for marking assumed alignment Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 21/36] net/intel: write descriptors using non-volatile pointers Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 22/36] net/intel: remove unnecessary flag clearing Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 23/36] net/intel: mark mid-burst ring cleanup as unlikely Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 24/36] net/intel: add special handling for single desc packets Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 25/36] net/intel: use separate array for desc status tracking Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 26/36] net/ixgbe: " Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 27/36] net/intel: drop unused Tx queue used count Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 28/36] net/intel: remove index for tracking end of packet Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 29/36] net/intel: merge ring writes in simple Tx for ice and i40e Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 30/36] net/intel: consolidate ice and i40e buffer free function Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 31/36] net/intel: complete merging simple Tx paths Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 32/36] net/intel: use non-volatile stores in simple Tx function Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 33/36] net/intel: align scalar simple Tx path with vector logic Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 34/36] net/intel: use vector SW ring entry for simple path Bruce Richardson
2026-01-13 15:14 ` [PATCH v2 35/36] net/intel: use vector mbuf cleanup from simple scalar path Bruce Richardson
2026-01-13 15:15 ` [PATCH v2 36/36] net/idpf: enable simple Tx function Bruce Richardson
2026-01-13 17:17 ` [PATCH v2 00/36] combine multiple Intel scalar Tx paths Stephen Hemminger
2026-01-23 6:26 ` Stephen Hemminger
2026-01-26 9:02 ` Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 " Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 01/36] net/intel: create common Tx descriptor structure Bruce Richardson
2026-02-06 9:56 ` Loftus, Ciara
2026-01-30 11:41 ` [PATCH v3 02/36] net/intel: use common Tx ring structure Bruce Richardson
2026-02-06 9:59 ` Loftus, Ciara
2026-01-30 11:41 ` [PATCH v3 03/36] net/intel: create common post-Tx cleanup function Bruce Richardson
2026-02-06 10:07 ` Loftus, Ciara
2026-02-09 10:41 ` Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 04/36] net/intel: consolidate definitions for Tx desc fields Bruce Richardson
2026-02-06 10:14 ` Loftus, Ciara
2026-02-09 10:43 ` Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 05/36] net/intel: create separate header for Tx scalar fns Bruce Richardson
2026-02-06 10:23 ` Loftus, Ciara
2026-02-09 11:04 ` Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 06/36] net/intel: add common fn to calculate needed descriptors Bruce Richardson
2026-02-06 10:25 ` Loftus, Ciara
2026-02-09 11:15 ` Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 07/36] net/ice: refactor context descriptor handling Bruce Richardson
2026-02-06 10:47 ` Loftus, Ciara
2026-02-09 11:16 ` Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 08/36] net/i40e: " Bruce Richardson
2026-02-06 10:54 ` Loftus, Ciara
2026-01-30 11:41 ` [PATCH v3 09/36] net/idpf: " Bruce Richardson
2026-02-06 10:59 ` Loftus, Ciara
2026-01-30 11:41 ` [PATCH v3 10/36] net/intel: consolidate checksum mask definition Bruce Richardson
2026-02-06 11:25 ` Loftus, Ciara
2026-02-09 11:40 ` Bruce Richardson
2026-02-09 15:00 ` Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 11/36] net/intel: create common checksum Tx offload function Bruce Richardson
2026-02-06 11:37 ` Loftus, Ciara
2026-02-09 11:41 ` Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 12/36] net/intel: create a common scalar Tx function Bruce Richardson
2026-02-06 12:01 ` Loftus, Ciara
2026-02-06 12:13 ` Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 13/36] net/i40e: use " Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 14/36] net/intel: add IPsec hooks to common " Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 15/36] net/intel: support configurable VLAN tag insertion on Tx Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 16/36] net/iavf: use common scalar Tx function Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 17/36] net/i40e: document requirement for QinQ support Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 18/36] net/idpf: use common scalar Tx function Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 19/36] net/intel: avoid writing the final pkt descriptor twice Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 20/36] eal: add macro for marking assumed alignment Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 21/36] net/intel: write descriptors using non-volatile pointers Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 22/36] net/intel: remove unnecessary flag clearing Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 23/36] net/intel: mark mid-burst ring cleanup as unlikely Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 24/36] net/intel: add special handling for single desc packets Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 25/36] net/intel: use separate array for desc status tracking Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 26/36] net/ixgbe: " Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 27/36] net/intel: drop unused Tx queue used count Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 28/36] net/intel: remove index for tracking end of packet Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 29/36] net/intel: merge ring writes in simple Tx for ice and i40e Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 30/36] net/intel: consolidate ice and i40e buffer free function Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 31/36] net/intel: complete merging simple Tx paths Bruce Richardson
2026-01-30 11:41 ` [PATCH v3 32/36] net/intel: use non-volatile stores in simple Tx function Bruce Richardson
2026-01-30 11:42 ` [PATCH v3 33/36] net/intel: align scalar simple Tx path with vector logic Bruce Richardson
2026-01-30 11:42 ` [PATCH v3 34/36] net/intel: use vector SW ring entry for simple path Bruce Richardson
2026-01-30 11:42 ` [PATCH v3 35/36] net/intel: use vector mbuf cleanup from simple scalar path Bruce Richardson
2026-01-30 11:42 ` [PATCH v3 36/36] net/idpf: enable simple Tx function Bruce Richardson
2026-01-30 17:56 ` [REVIEW] " Stephen Hemminger
2026-02-09 16:44 ` [PATCH v4 00/35] combine multiple Intel scalar Tx paths Bruce Richardson
2026-02-09 16:44 ` [PATCH v4 01/35] net/intel: create common Tx descriptor structure Bruce Richardson
2026-02-09 16:45 ` [PATCH v4 02/35] net/intel: use common Tx ring structure Bruce Richardson
2026-02-09 16:45 ` [PATCH v4 03/35] net/intel: create common post-Tx cleanup function Bruce Richardson
2026-02-10 12:18 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 04/35] net/intel: consolidate definitions for Tx desc fields Bruce Richardson
2026-02-10 12:26 ` Burakov, Anatoly
2026-02-10 16:47 ` Bruce Richardson
2026-02-09 16:45 ` [PATCH v4 05/35] net/intel: add common fn to calculate needed descriptors Bruce Richardson
2026-02-10 12:29 ` Burakov, Anatoly
2026-02-10 14:08 ` Bruce Richardson
2026-02-10 14:17 ` Burakov, Anatoly
2026-02-10 17:25 ` Bruce Richardson
2026-02-11 9:14 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 06/35] net/ice: refactor context descriptor handling Bruce Richardson
2026-02-10 12:42 ` Burakov, Anatoly
2026-02-10 17:40 ` Bruce Richardson
2026-02-11 9:17 ` Burakov, Anatoly
2026-02-11 10:38 ` Bruce Richardson
2026-02-09 16:45 ` [PATCH v4 07/35] net/i40e: " Bruce Richardson
2026-02-10 12:48 ` Burakov, Anatoly
2026-02-10 14:10 ` Bruce Richardson
2026-02-10 14:19 ` Burakov, Anatoly
2026-02-10 17:54 ` Bruce Richardson
2026-02-11 9:20 ` Burakov, Anatoly
2026-02-11 12:04 ` Bruce Richardson
2026-02-09 16:45 ` [PATCH v4 08/35] net/idpf: " Bruce Richardson
2026-02-10 12:52 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 09/35] net/intel: consolidate checksum mask definition Bruce Richardson
2026-02-10 13:00 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 10/35] net/intel: create common checksum Tx offload function Bruce Richardson
2026-02-10 13:04 ` Burakov, Anatoly
2026-02-10 17:56 ` Bruce Richardson
2026-02-09 16:45 ` [PATCH v4 11/35] net/intel: create a common scalar Tx function Bruce Richardson
2026-02-10 13:14 ` Burakov, Anatoly
2026-02-10 18:03 ` Bruce Richardson
2026-02-11 9:26 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 12/35] net/i40e: use " Bruce Richardson
2026-02-10 13:14 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 13/35] net/intel: add IPsec hooks to common " Bruce Richardson
2026-02-10 13:16 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 14/35] net/intel: support configurable VLAN tag insertion on Tx Bruce Richardson
2026-02-10 13:21 ` Burakov, Anatoly
2026-02-10 18:20 ` Bruce Richardson
2026-02-11 9:29 ` Burakov, Anatoly
2026-02-11 14:19 ` Bruce Richardson
2026-02-09 16:45 ` [PATCH v4 15/35] net/iavf: use common scalar Tx function Bruce Richardson
2026-02-10 13:27 ` Burakov, Anatoly
2026-02-10 18:31 ` Bruce Richardson
2026-02-09 16:45 ` [PATCH v4 16/35] net/i40e: document requirement for QinQ support Bruce Richardson
2026-02-10 13:27 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 17/35] net/idpf: use common scalar Tx function Bruce Richardson
2026-02-10 13:30 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 18/35] net/intel: avoid writing the final pkt descriptor twice Bruce Richardson
2026-02-10 13:31 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 19/35] eal: add macro for marking assumed alignment Bruce Richardson
2026-02-09 22:35 ` Morten Brørup
2026-02-11 14:45 ` Bruce Richardson
2026-02-09 16:45 ` [PATCH v4 20/35] net/intel: write descriptors using non-volatile pointers Bruce Richardson
2026-02-09 23:08 ` Morten Brørup
2026-02-10 9:03 ` Bruce Richardson
2026-02-10 9:28 ` Morten Brørup
2026-02-11 14:44 ` Bruce Richardson
2026-02-11 14:44 ` Bruce Richardson
2026-02-09 16:45 ` [PATCH v4 21/35] net/intel: remove unnecessary flag clearing Bruce Richardson
2026-02-10 13:33 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 22/35] net/intel: mark mid-burst ring cleanup as unlikely Bruce Richardson
2026-02-10 13:36 ` Burakov, Anatoly
2026-02-10 14:13 ` Bruce Richardson
2026-02-11 18:12 ` Bruce Richardson
2026-02-09 16:45 ` [PATCH v4 23/35] net/intel: add special handling for single desc packets Bruce Richardson
2026-02-10 13:57 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 24/35] net/intel: use separate array for desc status tracking Bruce Richardson
2026-02-10 14:11 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 25/35] net/ixgbe: " Bruce Richardson
2026-02-10 14:12 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 26/35] net/intel: drop unused Tx queue used count Bruce Richardson
2026-02-10 14:14 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 27/35] net/intel: remove index for tracking end of packet Bruce Richardson
2026-02-10 14:15 ` Burakov, Anatoly
2026-02-09 16:45 ` [PATCH v4 28/35] net/intel: merge ring writes in simple Tx for ice and i40e Bruce Richardson
2026-02-09 23:18 ` Medvedkin, Vladimir
2026-02-09 16:45 ` Bruce Richardson [this message]
2026-02-09 23:19 ` [PATCH v4 29/35] net/intel: consolidate ice and i40e buffer free function Medvedkin, Vladimir
2026-02-09 16:45 ` [PATCH v4 30/35] net/intel: complete merging simple Tx paths Bruce Richardson
2026-02-09 23:19 ` Medvedkin, Vladimir
2026-02-09 16:45 ` [PATCH v4 31/35] net/intel: use non-volatile stores in simple Tx function Bruce Richardson
2026-02-09 23:19 ` Medvedkin, Vladimir
2026-02-09 16:45 ` [PATCH v4 32/35] net/intel: align scalar simple Tx path with vector logic Bruce Richardson
2026-02-09 23:19 ` Medvedkin, Vladimir
2026-02-09 16:45 ` [PATCH v4 33/35] net/intel: use vector SW ring entry for simple path Bruce Richardson
2026-02-09 23:19 ` Medvedkin, Vladimir
2026-02-09 16:45 ` [PATCH v4 34/35] net/intel: use vector mbuf cleanup from simple scalar path Bruce Richardson
2026-02-09 23:19 ` Medvedkin, Vladimir
2026-02-09 16:45 ` [PATCH v4 35/35] net/idpf: enable simple Tx function Bruce Richardson
2026-02-09 23:20 ` Medvedkin, Vladimir
2026-02-11 18:12 ` [PATCH v5 00/35] combine multiple Intel scalar Tx paths Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 01/35] net/intel: create common Tx descriptor structure Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 02/35] net/intel: fix memory leak on TX queue setup failure Bruce Richardson
2026-02-12 12:14 ` Burakov, Anatoly
2026-02-11 18:12 ` [PATCH v5 03/35] net/intel: use common Tx ring structure Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 04/35] net/intel: create common post-Tx cleanup function Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 05/35] net/intel: consolidate definitions for Tx desc fields Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 06/35] net/intel: add common fn to calculate needed descriptors Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 07/35] net/ice: refactor context descriptor handling Bruce Richardson
2026-02-12 12:16 ` Burakov, Anatoly
2026-02-11 18:12 ` [PATCH v5 08/35] net/i40e: " Bruce Richardson
2026-02-12 12:19 ` Burakov, Anatoly
2026-02-11 18:12 ` [PATCH v5 09/35] net/idpf: " Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 10/35] net/intel: consolidate checksum mask definition Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 11/35] net/intel: create common checksum Tx offload function Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 12/35] net/intel: create a common scalar Tx function Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 13/35] net/i40e: use " Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 14/35] net/intel: add IPsec hooks to common " Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 15/35] net/intel: support configurable VLAN tag insertion on Tx Bruce Richardson
2026-02-12 12:20 ` Burakov, Anatoly
2026-02-11 18:12 ` [PATCH v5 16/35] net/iavf: use common scalar Tx function Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 17/35] net/i40e: document requirement for QinQ support Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 18/35] net/idpf: use common scalar Tx function Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 19/35] net/intel: avoid writing the final pkt descriptor twice Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 20/35] net/intel: write descriptors using non-volatile pointers Bruce Richardson
2026-02-11 21:14 ` Morten Brørup
2026-02-12 8:43 ` Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 21/35] net/intel: remove unnecessary flag clearing Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 22/35] net/intel: add special handling for single desc packets Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 23/35] net/intel: use separate array for desc status tracking Bruce Richardson
2026-02-11 21:51 ` Morten Brørup
2026-02-12 9:15 ` Bruce Richardson
2026-02-12 12:38 ` Morten Brørup
2026-02-11 18:12 ` [PATCH v5 24/35] net/ixgbe: " Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 25/35] net/intel: drop unused Tx queue used count Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 26/35] net/intel: remove index for tracking end of packet Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 27/35] net/intel: merge ring writes in simple Tx for ice and i40e Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 28/35] net/intel: consolidate ice and i40e buffer free function Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 29/35] net/intel: complete merging simple Tx paths Bruce Richardson
2026-02-11 18:12 ` [PATCH v5 30/35] net/intel: use non-volatile stores in simple Tx function Bruce Richardson
2026-02-11 18:13 ` [PATCH v5 31/35] net/intel: align scalar simple Tx path with vector logic Bruce Richardson
2026-02-11 18:13 ` [PATCH v5 32/35] net/intel: use vector SW ring entry for simple path Bruce Richardson
2026-02-11 18:13 ` [PATCH v5 33/35] net/intel: use vector mbuf cleanup from simple scalar path Bruce Richardson
2026-02-11 18:13 ` [PATCH v5 34/35] net/idpf: enable simple Tx function Bruce Richardson
2026-02-12 12:28 ` Burakov, Anatoly
2026-02-11 18:13 ` [PATCH v5 35/35] net/cpfl: " Bruce Richardson
2026-02-12 12:30 ` Burakov, Anatoly
2026-02-12 14:45 ` [PATCH v5 00/35] combine multiple Intel scalar Tx paths Bruce Richardson
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