public inbox for dev@dpdk.org
 help / color / mirror / Atom feed
From: Rahul Bhansali <rbhansali@marvell.com>
To: <dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>,
	Kiran Kumar K <kirankumark@marvell.com>,
	Sunil Kumar Kori <skori@marvell.com>,
	Satha Rao <skoteshwar@marvell.com>,
	Harman Kalra <hkalra@marvell.com>,
	"Rakesh Kudurumalla" <rkudurumalla@marvell.com>
Cc: <jerinj@marvell.com>, Rahul Bhansali <rbhansali@marvell.com>,
	<stable@dpdk.org>
Subject: [PATCH v2 17/18] common/cnxk: fix CPT CQ roll over handling
Date: Tue, 17 Feb 2026 11:13:44 +0530	[thread overview]
Message-ID: <20260217054345.2759687-17-rbhansali@marvell.com> (raw)
In-Reply-To: <20260217054345.2759687-1-rbhansali@marvell.com>

This fixes the handling of CPT CQ ring roll over case.

Fixes: a7d64a7740e0 ("net/cnxk: handle soft expiry")
Cc: stable@dpdk.org

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
---
Changes in v2: Updated commit message.

 drivers/common/cnxk/roc_cpt.c             |  2 +-
 drivers/common/cnxk/roc_cpt.h             |  1 +
 drivers/common/cnxk/roc_nix_inl.c         |  1 +
 drivers/common/cnxk/roc_nix_inl_dev_irq.c | 18 ++++++++++++------
 4 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c
index 83e0c9896b..63419884ac 100644
--- a/drivers/common/cnxk/roc_cpt.c
+++ b/drivers/common/cnxk/roc_cpt.c
@@ -712,7 +712,7 @@ cpt_lf_cq_init(struct roc_cpt_lf *lf)

 	lf_cq_base.s.addr = addr >> 7;
 	plt_write64(lf_cq_base.u, lf->rbase + CPT_LF_CQ_BASE);
-	lf_cq_size.s.size = PLT_ALIGN(len, ROC_ALIGN);
+	lf_cq_size.s.size = lf->cq_size;
 	plt_write64(lf_cq_size.u, lf->rbase + CPT_LF_CQ_SIZE);

 	return 0;
diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h
index 67956758be..7547d0b020 100644
--- a/drivers/common/cnxk/roc_cpt.h
+++ b/drivers/common/cnxk/roc_cpt.h
@@ -159,6 +159,7 @@ struct roc_cpt_lf {
 	bool cpt_cq_ena;
 	uint8_t cq_entry_size;
 	uint32_t cq_size;
+	uint32_t cq_head;
 	/* End of Input parameters */
 	struct plt_pci_device *pci_dev;
 	struct dev *dev;
diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c
index 86d571c6e2..aad2631673 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -1580,6 +1580,7 @@ roc_nix_inl_outb_init(struct roc_nix *roc_nix)
 				lf->cq_entry_size = 0;
 				lf->cq_all = 0;
 				lf->cq_size = lf->nb_desc;
+				lf->cq_head = 1;
 			}
 		}

diff --git a/drivers/common/cnxk/roc_nix_inl_dev_irq.c b/drivers/common/cnxk/roc_nix_inl_dev_irq.c
index 1c4822925c..89155a1f7d 100644
--- a/drivers/common/cnxk/roc_nix_inl_dev_irq.c
+++ b/drivers/common/cnxk/roc_nix_inl_dev_irq.c
@@ -57,8 +57,8 @@ nix_inl_cpt_cq_cb(struct roc_cpt_lf *lf)
 	union cpt_lf_cq_ptr cq_ptr;
 	struct cpt_cq_s *cq_s;
 	uint8_t fmt_msk = 0x3;
-	uint64_t nq_ptr;
-	uint32_t count;
+	uint32_t count, head;
+	uint32_t nq_ptr;
 	uint64_t i;

 	if (idev)
@@ -69,14 +69,15 @@ nix_inl_cpt_cq_cb(struct roc_cpt_lf *lf)
 		return;
 	}

+	head = lf->cq_head;
 	cq_base.u = plt_read64(lf->rbase + CPT_LF_CQ_BASE);
 	cq_ptr.u = plt_read64(lf->rbase + CPT_LF_CQ_PTR);
 	count = cq_ptr.s.count;
-
-	nq_ptr = (((cq_base.s.addr << 7)) + ((cq_ptr.s.nq_ptr - count) << 5));
-	cq_s = (struct cpt_cq_s *)nq_ptr;
+	nq_ptr = cq_ptr.s.nq_ptr;

 	for (i = 0; i < count; i++) {
+		cq_s = (struct cpt_cq_s *)(uintptr_t)(((cq_base.s.addr << 7)) + (head << 5));
+
 		if (cq_s->w0.s.uc_compcode && cq_s->w0.s.compcode) {
 			switch (cq_s->w2.s.fmt & fmt_msk) {
 			case WQE_PTR_CPTR:
@@ -93,8 +94,13 @@ nix_inl_cpt_cq_cb(struct roc_cpt_lf *lf)
 			inl_dev->work_cb(&tmp, sa, NIX_INL_CPT_CQ, (void *)cq_s, port_id);
 		}
 done:
-		cq_s = cq_s + 1;
+		head = (head + 1) % lf->cq_size;
 	}
+
+	lf->cq_head = head;
+	if (unlikely(nq_ptr != head))
+		plt_err("CPT LF[%d] CQ head %d != NQ ptr %d", lf->lf_id, head, nq_ptr);
+
 	/* Acknowledge the number of completed requests */
 	plt_write64(count, lf->rbase + CPT_LF_DONE_ACK);
 }
--
2.34.1


  parent reply	other threads:[~2026-02-17  5:45 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-28  6:02 [PATCH 01/18] common/cnxk: fix engine capabilities fetch logic Rahul Bhansali
2026-01-28  6:03 ` [PATCH 02/18] common/cnxk: remove dependency on cryptodev for RXC Rahul Bhansali
2026-01-28  6:03 ` [PATCH 03/18] common/cnxk: support inbound pdb configuration Rahul Bhansali
2026-01-28  6:03 ` [PATCH 04/18] common/cnxk: update CPT RXC structures Rahul Bhansali
2026-01-28  6:03 ` [PATCH 05/18] common/cnxk: update inline profile ID for cn20k Rahul Bhansali
2026-01-28  6:03 ` [PATCH 06/18] common/cnxk: update inline RQ mask Rahul Bhansali
2026-01-28  6:03 ` [PATCH 07/18] net/cnxk: avoid security flag for custom inbound SA Rahul Bhansali
2026-01-28  6:03 ` [PATCH 08/18] net/cnxk: add CPT code check for soft expiry Rahul Bhansali
2026-01-28  6:03 ` [PATCH 09/18] net/cnxk: skip write SA for cn20k Rahul Bhansali
2026-01-28  6:03 ` [PATCH 10/18] net/cnxk: update NIX reassembly fast path Rahul Bhansali
2026-01-28  6:03 ` [PATCH 11/18] net/cnxk: update aura batch free Rahul Bhansali
2026-01-28  6:03 ` [PATCH 12/18] net/cnxk: update fastpath function for OOP Rahul Bhansali
2026-01-28  6:03 ` [PATCH 13/18] event/cnxk: " Rahul Bhansali
2026-01-28  6:03 ` [PATCH 14/18] common/cnxk: flow rule config for non-inplace Rahul Bhansali
2026-01-28  6:03 ` [PATCH 15/18] net/cnxk: enable PDB in IPsec outbound path Rahul Bhansali
2026-01-28  6:03 ` [PATCH 16/18] common/cnxk: initialize CPT LF for CQ config Rahul Bhansali
2026-01-28  6:03 ` [PATCH 17/18] common/cnxk: fix CPT CQ roll over handling Rahul Bhansali
2026-01-28  6:03 ` [PATCH 18/18] common/cnxk: fix duplicate branch compiler warning Rahul Bhansali
2026-01-28 17:52   ` [REVIEW] " Stephen Hemminger
2026-02-11  8:13   ` [PATCH 18/18] " Jerin Jacob
2026-02-17  5:43 ` [PATCH v2 01/18] common/cnxk: fix engine capabilities fetch logic Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 02/18] common/cnxk: remove dependency on cryptodev for RXC Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 03/18] common/cnxk: support inbound pdb configuration Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 04/18] common/cnxk: update CPT RXC structures Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 05/18] common/cnxk: update inline profile ID for cn20k Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 06/18] common/cnxk: update inline RQ mask configuration Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 07/18] net/cnxk: fix security flag for custom inbound SA Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 08/18] net/cnxk: add CPT code check for soft expiry Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 09/18] net/cnxk: skip write SA for cn20k Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 10/18] net/cnxk: update NIX reassembly fast path Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 11/18] net/cnxk: update aura batch free Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 12/18] net/cnxk: support out of place (OOP) in fastpath Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 13/18] event/cnxk: " Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 14/18] common/cnxk: flow rule config for non-inplace Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 15/18] net/cnxk: enable PDB in IPsec outbound path Rahul Bhansali
2026-02-17  5:43   ` [PATCH v2 16/18] common/cnxk: initialize CPT LF for CQ config Rahul Bhansali
2026-02-17  5:43   ` Rahul Bhansali [this message]
2026-02-17  5:43   ` [PATCH v2 18/18] common/cnxk: fix duplicate branch compiler warning Rahul Bhansali
2026-02-17 17:20     ` Jerin Jacob

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260217054345.2759687-17-rbhansali@marvell.com \
    --to=rbhansali@marvell.com \
    --cc=dev@dpdk.org \
    --cc=hkalra@marvell.com \
    --cc=jerinj@marvell.com \
    --cc=kirankumark@marvell.com \
    --cc=ndabilpuram@marvell.com \
    --cc=rkudurumalla@marvell.com \
    --cc=skori@marvell.com \
    --cc=skoteshwar@marvell.com \
    --cc=stable@dpdk.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox