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[204.195.96.226]) by smtp.gmail.com with ESMTPSA id af79cd13be357-8cb2b1c883dsm2073918685a.32.2026.02.19.10.58.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Feb 2026 10:58:48 -0800 (PST) Date: Thu, 19 Feb 2026 10:58:45 -0800 From: Stephen Hemminger To: Rahul Bhansali Cc: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Harman Kalra , , Rakesh Kudurumalla Subject: Re: [PATCH 1/8] net/cnxk: support of plain packet reassembly Message-ID: <20260219105845.42a54e18@phoenix.local> In-Reply-To: <20260219090847.3257753-1-rbhansali@marvell.com> References: <20260219090847.3257753-1-rbhansali@marvell.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Thu, 19 Feb 2026 14:38:40 +0530 Rahul Bhansali wrote: > From: Rakesh Kudurumalla >=20 > Adds support of plain packet reassembly by configuring > UCAST_CPT rule. >=20 > Signed-off-by: Rakesh Kudurumalla > --- Automated review found these issues to address. Patch 1/8: net/cnxk: support of plain packet reassembly &dev->rqs[i] can never be NULL =E2=80=94 it's an array offset. The NULL che= ck should be on eth_dev->data->rx_queues[i] instead, which is used immediately after without any guard. If roc_nix_inl_dev_rq_get() or roc_npa_buf_type_update() fails mid-loop, RQs obtained in prior iterations are never released via roc_nix_inl_dev_rq_put(). cnxk_nix_ip_reass_rule_set() returns -EIO on all error paths, discarding the actual rc. The mcam_write_failed label also overwrites rc with the result of roc_npc_mcam_free(), losing the original write error.=20 Missing co-developer Signed-off-by (sent by Rahul, From Rakesh). Patch 2/8: net/cnxk: support IPsec Rx inject for cn20k sa_base &=3D ~0xFFFFUL is inside the per-packet loop but only matters on the first iteration. Should be hoisted before the loop for clarity. Release notes: "CN20k Soc" should be "CN20K SoC" to match patch 1. Patch 8/8: common/cnxk: enable CPT CQ for inline IPSec inbound nix_inl_cpt_cq_inb_setup(): if cpt_lf_register_irqs() fails, the CQ from cpt_lf_cq_init() on that LF is not cleaned up, and prior successfully-setup LFs may have inconsistent state during the error path teardown. Unnecessary cast of void * to struct roc_cpt_lf * in nix_inl_cpt_done_irq().