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[204.195.96.226]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-2bdd1f23c01sm382509eec.16.2026.02.25.15.09.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Feb 2026 15:09:09 -0800 (PST) Date: Wed, 25 Feb 2026 15:09:07 -0800 From: Stephen Hemminger To: Ashok Kumar Natarajan Cc: , Subject: Re: [PATCH v2 1/3] net/axgbe: add external PHY read/write functions Message-ID: <20260225150907.54d467ef@phoenix.local> In-Reply-To: <20260225124456.1871-1-ashokkumar.natarajan@amd.com> References: <20260216125205.1032-1-ashokkumar.natarajan@amd.com> <20260225124456.1871-1-ashokkumar.natarajan@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Wed, 25 Feb 2026 18:14:54 +0530 Ashok Kumar Natarajan wrote: > Introduce helper functions to perform external PHY register read and > write operations. These helpers currently support only IEEE Clause 22 > PHY access, providing a simple and consistent API for accessing > standard 16=E2=80=91bit MII registers on external PHY devices. >=20 > Signed-off-by: Ashok Kumar Natarajan > --- I didn't see anything here, but AI spotted some things. Please revise and resubmit. Thanks for the series. A few findings, mostly in patch 2: Patch 2 (M88E1512 support): 1. axgbe_phy_link_status() always returns 0 (link up) even when the M88E1512 reports link down or the read fails. The goto out path leads to return 0, which means "link up" in this function's contract. The link-down and error paths need to return a non-zero value.=20 2. Integer shift UB in axgbe_get_phy_id(): (u32)(phy_id_1 << 16) evaluates = the shift at int width before widening. If bit 15 of phy_id_1 is set, shifting into the sign bit is undefined behavior. Move the cast before the shift: (u32)phy_id_1 << 16.=20 3. axgbe_get_ext_phy_link_status() doesn't set *linkup =3D false on the BMCR_ANRESTART early-return path. Works today because the caller pre-initializes the variable, but the function should be self-contained. 4. The new out label unconditionally clears rx_adapt_done on the M88E1512 link-down path =E2=80=94 please verify this is intentional and doesn't interfere with the internal SerDes receiver adaptation state machine. Patch 3 (100Mbps): 5. The SPEED_1000 =E2=86=92 SPEED_100 change in axgbe_sgmii_100_mode() is a= bug fix in existing code =E2=80=94 the 100M mode function was incorrectly = configuring the MAC for 1G. This should have its own Fixes: tag and Cc: sta= ble@dpdk.org so it gets backported to stable branches. Item 1 is the most critical =E2=80=94 it inverts link status reporting for = the M88E1512.