From: Soumyadeep Hore <soumyadeep.hore@intel.com>
To: bruce.richardson@intel.com, manoj.kumar.subbarao@intel.com,
aman.deep.singh@intel.com, dev@dpdk.org
Cc: Maciej Paczkowski <maciej.paczkowski@intel.com>
Subject: [PATCH v1 2/6] net/ice/base: resolve comparison-with-wider-type violations
Date: Tue, 10 Mar 2026 05:52:09 -0400 [thread overview]
Message-ID: <20260310095218.703423-7-soumyadeep.hore@intel.com> (raw)
In-Reply-To: <20260310095218.703423-1-soumyadeep.hore@intel.com>
From: Maciej Paczkowski <maciej.paczkowski@intel.com>
- This patch resolves violations raised by Windows CodeQL
tool related to comparison-with-wider-type error.
- Added data type casting to resolve these errors.
Signed-off-by: Maciej Paczkowski <maciej.paczkowski@intel.com>
Signed-off-by: Soumyadeep Hore <soumyadeep.hore@intel.com>
---
drivers/net/intel/ice/base/ice_acl_ctrl.c | 6 +++---
drivers/net/intel/ice/base/ice_bitops.h | 14 +++++++-------
drivers/net/intel/ice/base/ice_dcb.c | 8 ++++----
drivers/net/intel/ice/base/ice_sched.c | 3 ++-
drivers/net/intel/ice/base/ice_switch.c | 2 +-
5 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/drivers/net/intel/ice/base/ice_acl_ctrl.c b/drivers/net/intel/ice/base/ice_acl_ctrl.c
index 6cee2c98ea..6ec9f7f754 100644
--- a/drivers/net/intel/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/intel/ice/base/ice_acl_ctrl.c
@@ -494,7 +494,7 @@ ice_acl_alloc_partition(struct ice_hw *hw, struct ice_acl_scen *req)
* is available.
*/
p = dir > 0 ? i : ICE_AQC_MAX_TCAM_ALLOC_UNITS - i - 1;
- for (w = row; w < row + width && avail; w++) {
+ for (w = row; w < (u16)(row + width) && avail; w++) {
u16 b;
b = (w * ICE_AQC_MAX_TCAM_ALLOC_UNITS) + p;
@@ -644,7 +644,7 @@ ice_acl_set_scen_chnk_msk(struct ice_aqc_acl_scen *scen_buf,
* For each TCAM, there will be (ICE_AQC_ACL_TCAM_DEPTH
* / ICE_ACL_ENTRY_ALLOC_UNIT) or 8 chunks.
*/
- for (i = tcam_idx; i < tcam_idx + num_cscd; i++)
+ for (i = tcam_idx; i < (u16)(tcam_idx + num_cscd); i++)
scen_buf->tcam_cfg[i].chnk_msk |= BIT(chnk_offst);
chnk_offst = (chnk_offst + 1) % ICE_AQC_MAX_TCAM_ALLOC_UNITS;
@@ -799,7 +799,7 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
ICE_AQC_ACL_ALLOC_SCE_START_CMP;
/* cascade TCAMs up to the width of the scenario */
- for (i = k; i < cascade_cnt + k; i++) {
+ for (i = k; i < (u8)(cascade_cnt + k); i++) {
ice_acl_fill_tcam_select(&scen_buf, scen, i, i - k);
ice_acl_assign_act_mem_for_scen(hw->acl_tbl, scen,
&scen_buf,
diff --git a/drivers/net/intel/ice/base/ice_bitops.h b/drivers/net/intel/ice/base/ice_bitops.h
index 85e14a2358..829b2062c8 100644
--- a/drivers/net/intel/ice/base/ice_bitops.h
+++ b/drivers/net/intel/ice/base/ice_bitops.h
@@ -188,7 +188,7 @@ ice_and_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
u16 i;
/* Handle all but the last chunk */
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++) {
+ for (i = 0; i < (u16)(BITS_TO_CHUNKS(size) - 1); i++) {
dst[i] = bmp1[i] & bmp2[i];
res |= dst[i];
}
@@ -225,7 +225,7 @@ ice_or_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
u16 i;
/* Handle all but last chunk */
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ for (i = 0; i < (u16)(BITS_TO_CHUNKS(size) - 1); i++)
dst[i] = bmp1[i] | bmp2[i];
/* We want to only OR bits within the size. Furthermore, we also do
@@ -256,7 +256,7 @@ ice_xor_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
u16 i;
/* Handle all but last chunk */
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ for (i = 0; i < (u16)(BITS_TO_CHUNKS(size) - 1); i++)
dst[i] = bmp1[i] ^ bmp2[i];
/* We want to only XOR bits within the size. Furthermore, we also do
@@ -287,7 +287,7 @@ ice_andnot_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
u16 i;
/* Handle all but last chunk */
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ for (i = 0; i < (u16)(BITS_TO_CHUNKS(size) - 1); i++)
dst[i] = bmp1[i] & ~bmp2[i];
/* We want to only clear bits within the size. Furthermore, we also do
@@ -330,7 +330,7 @@ ice_find_next_bit(const ice_bitmap_t *bitmap, u16 size, u16 offset)
}
/* Now we handle the remaining chunks, if any */
- for (i++; i < BITS_TO_CHUNKS(size); i++) {
+ for (i++; i < (u16)BITS_TO_CHUNKS(size); i++) {
if (bitmap[i] != 0) {
u16 off = i * BITS_PER_CHUNK;
@@ -405,7 +405,7 @@ ice_bitmap_set(ice_bitmap_t *dst, u16 pos, u16 num_bits)
{
u16 i;
- for (i = pos; i < pos + num_bits; i++)
+ for (i = pos; i < (u16)(pos + num_bits); i++)
ice_set_bit(i, dst);
}
@@ -447,7 +447,7 @@ ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size)
u16 i;
/* Handle all but last chunk */
- for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
+ for (i = 0; i < (u16)(BITS_TO_CHUNKS(size) - 1); i++)
if (bmp1[i] != bmp2[i])
return false;
diff --git a/drivers/net/intel/ice/base/ice_dcb.c b/drivers/net/intel/ice/base/ice_dcb.c
index 607af03525..f5fbf535d5 100644
--- a/drivers/net/intel/ice/base/ice_dcb.c
+++ b/drivers/net/intel/ice/base/ice_dcb.c
@@ -465,7 +465,7 @@ ice_parse_cee_app_tlv(struct ice_cee_feat_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
{
u16 len, typelen, offset = 0;
struct ice_cee_app_prio *app;
- u8 i;
+ u32 i;
typelen = NTOHS(tlv->hdr.typelen);
len = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);
@@ -790,8 +790,8 @@ ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,
struct ice_port_info *pi)
{
u32 status, tlv_status = LE32_TO_CPU(cee_cfg->tlv_status);
- u32 ice_aqc_cee_status_mask, ice_aqc_cee_status_shift;
- u8 i, j, err, sync, oper, app_index, ice_app_sel_type;
+ u32 j, ice_aqc_cee_status_mask, ice_aqc_cee_status_shift;
+ u8 i, err, sync, oper, app_index, ice_app_sel_type;
u16 app_prio = LE16_TO_CPU(cee_cfg->oper_app_prio);
u16 ice_aqc_cee_app_mask, ice_aqc_cee_app_shift;
struct ice_dcbx_cfg *cmp_dcbcfg, *dcbcfg;
@@ -1324,7 +1324,7 @@ ice_add_ieee_app_pri_tlv(struct ice_lldp_org_tlv *tlv,
* Bits:|23 21|20 19|18 16|15 0|
* -----------------------------------------
*/
- while (i < dcbcfg->numapps) {
+ while (i < (u8)dcbcfg->numapps) {
priority = dcbcfg->app[i].priority & 0x7;
selector = dcbcfg->app[i].selector & 0x7;
buf[offset] = (priority << ICE_IEEE_APP_PRIO_S) | selector;
diff --git a/drivers/net/intel/ice/base/ice_sched.c b/drivers/net/intel/ice/base/ice_sched.c
index 3a0907eda7..2b867b74de 100644
--- a/drivers/net/intel/ice/base/ice_sched.c
+++ b/drivers/net/intel/ice/base/ice_sched.c
@@ -1257,7 +1257,8 @@ int ice_sched_init_port(struct ice_port_info *pi)
u8 num_branches;
u16 num_elems;
int status;
- u8 i, j;
+ u8 i;
+ u16 j;
if (!pi)
return ICE_ERR_PARAM;
diff --git a/drivers/net/intel/ice/base/ice_switch.c b/drivers/net/intel/ice/base/ice_switch.c
index fff61b89d7..94099c5215 100644
--- a/drivers/net/intel/ice/base/ice_switch.c
+++ b/drivers/net/intel/ice/base/ice_switch.c
@@ -7437,7 +7437,7 @@ ice_fill_fv_word_index(struct ice_hw *hw, struct LIST_HEAD_TYPE *fv_list,
struct ice_fv_word *pr;
bool found = false;
u16 mask;
- u8 j;
+ u16 j;
pr = &rg->r_group.pairs[i];
mask = rg->r_group.mask[i];
--
2.47.1
next prev parent reply other threads:[~2026-03-09 21:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-10 9:52 [PATCH v1 0/6] Update ICE Base Driver Soumyadeep Hore
2026-03-10 9:52 ` [PATCH v1 1/6] net/ice/base: update crash on invalid topology Soumyadeep Hore
2026-03-10 9:52 ` Soumyadeep Hore [this message]
2026-03-10 9:52 ` [PATCH v1 3/6] net/ice/base: enable LLDP filter control for E830 Soumyadeep Hore
2026-03-10 9:52 ` [PATCH v1 4/6] net/ice/base: support RDMA on 4+ ports of E830 Soumyadeep Hore
2026-03-10 9:52 ` [PATCH v1 5/6] net/ice/base: add pending admin queue events API Soumyadeep Hore
2026-03-10 9:52 ` [PATCH v1 6/6] net/ice/base: fix 'adjust' timer programming for E830 Soumyadeep Hore
2026-03-10 14:08 ` [PATCH v1 0/6] Update ICE Base Driver Bruce Richardson
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