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From: Rayane Boussanni <rboussanni@gmail.com>
To: dsosnowski@nvidia.com
Cc: bingz@nvidia.com, dev@dpdk.org, matan@nvidia.com,
	orika@nvidia.com, rasland@nvidia.com, suanmingm@nvidia.com,
	viacheslavo@nvidia.com, Rayane Boussanni <rboussanni@gmail.com>
Subject: [PATCH v2] net/mlx5: query hardware capability for max lro size
Date: Fri, 24 Apr 2026 10:27:32 -0400	[thread overview]
Message-ID: <20260424142732.1904-1-rboussanni@gmail.com> (raw)
In-Reply-To: <7z76boxf6nf3hzvspmc76ldy6idbynhusjcvlik2trkccupfiw@5ldoyqampej3>

Resolve a FIXME in mlx5_dev_infos_get() by dynamically checking the
lro_allowed flag instead of unconditionally advertising
MLX5_MAX_LRO_SIZE.

Signed-off-by: Rayane Boussanni <rboussanni@gmail.com>
---

Thank you Dariusz for the review!

 drivers/net/mlx5/mlx5_ethdev.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index a29cdeeb50..734ce0e60d 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -363,9 +363,9 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
 	info->min_mtu = priv->min_mtu;
 	info->max_mtu = priv->max_mtu;
 	info->max_rx_pktlen = info->max_mtu + MLX5_ETH_OVERHEAD;
-	/* FIXME: we should ask the device for these values. */
 	info->min_rx_bufsize = 32;
-	info->max_lro_pkt_size = MLX5_MAX_LRO_SIZE;
+	info->max_lro_pkt_size = priv->sh->config.lro_allowed ?
+				 MLX5_MAX_LRO_SIZE : 0;
 	/*
 	 * Since we need one CQ per QP, the limit is the minimum number
 	 * between the two values.
-- 
2.43.0.windows.1


  reply	other threads:[~2026-04-24 14:28 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-20 18:48 [PATCH] net/mlx5: query hardware capability for max lro size Rayane Boussanni
2026-04-24  8:52 ` Dariusz Sosnowski
2026-04-24 14:27   ` Rayane Boussanni [this message]
2026-04-24 16:55     ` [PATCH v2] " Dariusz Sosnowski

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