From: Ciara Loftus <ciara.loftus@intel.com>
To: dev@dpdk.org
Cc: Deepthi Kavalur <deepthi.kavalur@intel.com>,
stable@dpdk.org, Ciara Loftus <ciara.loftus@intel.com>
Subject: [PATCH 2/3] net/i40e/base: fix loop counter width in DCB parsing
Date: Tue, 19 May 2026 14:52:22 +0000 [thread overview]
Message-ID: <20260519145227.308814-3-ciara.loftus@intel.com> (raw)
In-Reply-To: <20260519145227.308814-1-ciara.loftus@intel.com>
From: Deepthi Kavalur <deepthi.kavalur@intel.com>
Loop counters in i40e_parse_cee_app_tlv() and
i40e_add_ieee_app_pri_tlv() are declared as u8 but compared against
numapps which is u32. If numapps exceeds 255 the counter wraps,
truncating the iteration. Widen the counters to u32.
Fixes: 166dceeeeafc ("i40e/base: add parsing for CEE DCBX TLVs")
Fixes: 0d9d27bb8684 ("i40e/base: prepare local LLDP MIB in TLV")
Cc: stable@dpdk.org
Signed-off-by: Deepthi Kavalur <deepthi.kavalur@intel.com>
Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
---
.mailmap | 1 +
drivers/net/intel/i40e/base/i40e_dcb.c | 6 +++---
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/.mailmap b/.mailmap
index f3130df686..6121833c25 100644
--- a/.mailmap
+++ b/.mailmap
@@ -371,6 +371,7 @@ Dean Marx <dmarx@iol.unh.edu>
Declan Doherty <declan.doherty@intel.com>
Deepak Khandelwal <deepak.khandelwal@intel.com>
Deepak Kumar Jain <deepak.k.jain@intel.com>
+Deepthi Kavalur <deepthi.kavalur@intel.com>
Deirdre O'Connor <deirdre.o.connor@intel.com>
Dekel Peled <dekelp@nvidia.com> <dekelp@mellanox.com>
Dengdui Huang <huangdengdui@huawei.com>
diff --git a/drivers/net/intel/i40e/base/i40e_dcb.c b/drivers/net/intel/i40e/base/i40e_dcb.c
index 04322ea034..c1d97fabab 100644
--- a/drivers/net/intel/i40e/base/i40e_dcb.c
+++ b/drivers/net/intel/i40e/base/i40e_dcb.c
@@ -364,7 +364,7 @@ static void i40e_parse_cee_app_tlv(struct i40e_cee_feat_tlv *tlv,
{
u16 length, typelength, offset = 0;
struct i40e_cee_app_prio *app;
- u8 i;
+ u32 i;
typelength = I40E_NTOHS(tlv->hdr.typelen);
length = (u16)((typelength & I40E_LLDP_TLV_LEN_MASK) >>
@@ -1169,9 +1169,9 @@ static void i40e_add_ieee_app_pri_tlv(struct i40e_lldp_org_tlv *tlv,
struct i40e_dcbx_config *dcbcfg)
{
u16 typelength, length, offset = 0;
- u8 priority, selector, i = 0;
u8 *buf = tlv->tlvinfo;
- u32 ouisubtype;
+ u32 ouisubtype, i = 0;
+ u8 priority, selector;
/* No APP TLVs then just return */
if (dcbcfg->numapps == 0)
--
2.43.0
next prev parent reply other threads:[~2026-05-19 14:52 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-19 14:52 [PATCH 0/3] i40e base code update Ciara Loftus
2026-05-19 14:52 ` [PATCH 1/3] net/i40e/base: fix integer overflow in NVM timing logic Ciara Loftus
2026-05-19 14:52 ` Ciara Loftus [this message]
2026-05-19 14:52 ` [PATCH 3/3] net/i40e/base: update version info Ciara Loftus
2026-05-20 10:17 ` [PATCH 0/3] i40e base code update Bruce Richardson
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