From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B7C2CD98F8 for ; Sat, 20 Jun 2026 02:33:19 +0000 (UTC) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 465A940A84; Sat, 20 Jun 2026 04:32:08 +0200 (CEST) Received: from mail-yw1-f179.google.com (mail-yw1-f179.google.com [209.85.128.179]) by mails.dpdk.org (Postfix) with ESMTP id 6FA9040E1E for ; Sat, 20 Jun 2026 04:32:04 +0200 (CEST) Received: by mail-yw1-f179.google.com with SMTP id 00721157ae682-7dc2b658544so24738307b3.2 for ; Fri, 19 Jun 2026 19:32:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=networkplumber-org.20251104.gappssmtp.com; s=20251104; t=1781922724; x=1782527524; darn=dpdk.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PznqqSezaXC7pgR8pla3KxOXEuwwYv6++wFFs21oqTU=; b=l7eLFlaihwLUuLFFFBEWvsAmd3iTNbfmliSIgjsFaLwm+5WAL+KasCi2/yuwbjU2kp NXH+zW8B2Lb0AH1dbHBIHE+ZsXenNPaRUwPpdF/6hEejBpuA8cT92Aa/dctl3wOaCOqy Hzj83VAdRC43mT3uXTfMTQDgqPQ788uZUQMoYpcWjzYtzTGary+M2XnCDNx+yhEzPwEG 9Q+NyA04yc5HudwYvml7WQepo3GjTvGKCaxOMuSPo5SMVKDnn8t4IE4LW4s+YRrV+2f2 yMHifQnShcJtSZpY17NxaD9NVC14BF4kj44ydwF9eZwKis7oxZvAjJxfb7WmInisPr2I aUxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781922724; x=1782527524; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=PznqqSezaXC7pgR8pla3KxOXEuwwYv6++wFFs21oqTU=; b=nwJOVJV8EULYJrGs+4HfM4ARk0F0w+FsrM8T6A7HGnQWlS+RCaP0D/Nvcow+acktG0 ZVo3MjHYVDpDw2hfn4AvwWK8kvNoJVxom4abWPmvZn9ig4JYzP0mBmSZfM6IOz3o3gbo J14mZY8GCpgqU1dV5R6V3GQ9/49LDUu0apaTgpzW8tVAlez+tKtshvGmve3qmPqTDAXt DOFyiGPPbaVj+AXhJ/RnlTd6gxcmUQwD+0RLQnOSqWCuKjU5I0vGV+48JcIRwALT4BjW bWmsAbH5DPiI778kifnNaFvMWATwf9wpyhX7AMgf7l+gyRhv9t2sFuxHb1iURtprzzq4 l75Q== X-Gm-Message-State: AOJu0YwIGxHUST+1aD+AMlh/cYphImN+H1PwF7n643XrjEZ98g+2By0G w2qDEwrA/+CSBcBuDzOhiBJsUOfXoE1zX9euZ8FlNDTyD2hlfqxdtLVopzGQFbJIk00hgFtVv4B LR2H7 X-Gm-Gg: AfdE7ckBrK0CyMLyR4CfwgE2ThYMX7wf93ZLbQqf7r0NHAqnu0QVjuMcpf7rpUpIQfo 0sCivqWSBtxHBOfFXG1cOD8hGh1HQxtcoWAYMe54iZtDRgN9G82yTEqCGjTSc9K3EUm3i6eRPnC qxqPYElk/WgKoxpSm9dZTMKFuWSj7h7ckPFPUYFsuiJ9JUZtg3HkXdI9lYzkbbA/D9NCqGbVU3d DTUf6uy1sPmZvGxd8qGwckWoj9cZRbLWBa28Xm0FX+DyFuRYsc39muZy5divbU1u8gfo7eA9DIo 4Z+aYEPDr56FdE1nnzf0sI9BwyC6UE9xgNJasAZSX3rdqOpDbvP0nD+qSKJQVcolILTt3A2G/Z9 trzatWmuY27ry5Leio3jx/zOTwSHiJZMX8v1l9oMCnKAJpZqAi2QfPUJTby2cX90X1LgSJB4qmD Frq/diQLxXbD5AvhNGaSy53ReM3pHN0jGbGsv9JDswHoO8Hp24eKfUnaYjWsvvWQ== X-Received: by 2002:a05:690c:498b:b0:7ff:f11:5020 with SMTP id 00721157ae682-801759e4efdmr47868047b3.8.1781922723603; Fri, 19 Jun 2026 19:32:03 -0700 (PDT) Received: from phoenix.lan (204-195-96-226.wavecable.com. [204.195.96.226]) by smtp.gmail.com with ESMTPSA id 00721157ae682-8025c96ffd5sm6045897b3.9.2026.06.19.19.32.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Jun 2026 19:32:03 -0700 (PDT) From: Stephen Hemminger To: dev@dpdk.org Cc: Stephen Hemminger , Hemant Agrawal , Sachin Saxena , Jerin Jacob Subject: [PATCH v5 18/24] drivers/event: replace rte_atomic32 in selftests Date: Fri, 19 Jun 2026 19:28:43 -0700 Message-ID: <20260620023134.42877-19-stephen@networkplumber.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260620023134.42877-1-stephen@networkplumber.org> References: <20260620023134.42877-1-stephen@networkplumber.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Last callers in these selftests of the rte_atomicNN_*() family, which is being deprecated. Convert total_events from rte_atomic32_t to RTE_ATOMIC(uint32_t) for the stack-local instance and __rte_atomic uint32_t * for the pointer in test_core_param. Switch reads and updates to rte_atomic_*_explicit(). Reads in the busy-loop checks and progress logs use relaxed: the counter is purely a "drained yet?" signal and no data is published through it. The fetch_sub on the dequeue path uses release in octeontx (preserving the publish-after-mbuf-free ordering already implied by the seq_cst sub it replaces) and relaxed in dpaa2. The stack-local atomic_total_events is initialized by direct assignment instead of rte_atomic32_set(), since it is written before any worker is launched. Signed-off-by: Stephen Hemminger --- drivers/event/dpaa2/dpaa2_eventdev_selftest.c | 26 ++++---- drivers/event/octeontx/ssovf_evdev_selftest.c | 61 ++++++++++--------- 2 files changed, 47 insertions(+), 40 deletions(-) diff --git a/drivers/event/dpaa2/dpaa2_eventdev_selftest.c b/drivers/event/dpaa2/dpaa2_eventdev_selftest.c index 9d4938efe6..2c688bd194 100644 --- a/drivers/event/dpaa2/dpaa2_eventdev_selftest.c +++ b/drivers/event/dpaa2/dpaa2_eventdev_selftest.c @@ -2,7 +2,7 @@ * Copyright 2018-2019 NXP */ -#include +#include #include #include #include @@ -49,7 +49,7 @@ struct event_attr { }; struct test_core_param { - rte_atomic32_t *total_events; + __rte_atomic uint32_t *total_events; uint64_t dequeue_tmo_ticks; uint8_t port; uint8_t sched_type; @@ -444,10 +444,10 @@ worker_multi_port_fn(void *arg) struct rte_event ev; uint16_t valid_event; uint8_t port = param->port; - rte_atomic32_t *total_events = param->total_events; + __rte_atomic uint32_t *total_events = param->total_events; int ret; - while (rte_atomic32_read(total_events) > 0) { + while (rte_atomic_load_explicit(total_events, rte_memory_order_relaxed) > 0) { valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0); if (!valid_event) continue; @@ -455,13 +455,15 @@ worker_multi_port_fn(void *arg) ret = validate_event(&ev); RTE_TEST_ASSERT_SUCCESS(ret, "Failed to validate event"); rte_pktmbuf_free(ev.mbuf); - rte_atomic32_sub(total_events, 1); + + rte_atomic_fetch_sub_explicit(total_events, 1, + rte_memory_order_relaxed); } return 0; } static int -wait_workers_to_join(int lcore, const rte_atomic32_t *count) +wait_workers_to_join(int lcore, const __rte_atomic uint32_t *count) { uint64_t cycles, print_cycles; @@ -472,15 +474,15 @@ wait_workers_to_join(int lcore, const rte_atomic32_t *count) uint64_t new_cycles = rte_get_timer_cycles(); if (new_cycles - print_cycles > rte_get_timer_hz()) { - dpaa2_evdev_dbg("\r%s: events %d", __func__, - rte_atomic32_read(count)); + dpaa2_evdev_dbg("\r%s: events %u", __func__, + rte_atomic_load_explicit(count, rte_memory_order_relaxed)); print_cycles = new_cycles; } if (new_cycles - cycles > rte_get_timer_hz() * 10) { dpaa2_evdev_info( - "%s: No schedules for seconds, deadlock (%d)", + "%s: No schedules for seconds, deadlock (%u)", __func__, - rte_atomic32_read(count)); + rte_atomic_load_explicit(count, rte_memory_order_relaxed)); rte_event_dev_dump(evdev, stdout); cycles = new_cycles; return -1; @@ -500,13 +502,13 @@ launch_workers_and_wait(int (*main_worker)(void *), int w_lcore; int ret; struct test_core_param *param; - rte_atomic32_t atomic_total_events; + RTE_ATOMIC(uint32_t) atomic_total_events; uint64_t dequeue_tmo_ticks; if (!nb_workers) return 0; - rte_atomic32_set(&atomic_total_events, total_events); + atomic_total_events = total_events; RTE_BUILD_BUG_ON(NUM_PACKETS < MAX_EVENTS); param = malloc(sizeof(struct test_core_param) * nb_workers); diff --git a/drivers/event/octeontx/ssovf_evdev_selftest.c b/drivers/event/octeontx/ssovf_evdev_selftest.c index b54ae126d2..5eeed2b2ce 100644 --- a/drivers/event/octeontx/ssovf_evdev_selftest.c +++ b/drivers/event/octeontx/ssovf_evdev_selftest.c @@ -4,7 +4,7 @@ #include -#include +#include #include #include #include @@ -84,7 +84,7 @@ seqn_list_check(int limit) } struct test_core_param { - rte_atomic32_t *total_events; + __rte_atomic uint32_t *total_events; uint64_t dequeue_tmo_ticks; uint8_t port; uint8_t sched_type; @@ -558,10 +558,10 @@ worker_multi_port_fn(void *arg) struct rte_event ev; uint16_t valid_event; uint8_t port = param->port; - rte_atomic32_t *total_events = param->total_events; + __rte_atomic uint32_t *total_events = param->total_events; int ret; - while (rte_atomic32_read(total_events) > 0) { + while (rte_atomic_load_explicit(total_events, rte_memory_order_relaxed) > 0) { valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0); if (!valid_event) continue; @@ -569,13 +569,14 @@ worker_multi_port_fn(void *arg) ret = validate_event(&ev); RTE_TEST_ASSERT_SUCCESS(ret, "Failed to validate event"); rte_pktmbuf_free(ev.mbuf); - rte_atomic32_sub(total_events, 1); + + rte_atomic_fetch_sub_explicit(total_events, 1, rte_memory_order_release); } return 0; } static inline int -wait_workers_to_join(int lcore, const rte_atomic32_t *count) +wait_workers_to_join(int lcore, const __rte_atomic uint32_t *count) { uint64_t cycles, print_cycles; RTE_SET_USED(count); @@ -583,17 +584,16 @@ wait_workers_to_join(int lcore, const rte_atomic32_t *count) print_cycles = cycles = rte_get_timer_cycles(); while (rte_eal_get_lcore_state(lcore) != WAIT) { uint64_t new_cycles = rte_get_timer_cycles(); + uint32_t cur_count = rte_atomic_load_explicit(count, rte_memory_order_relaxed); if (new_cycles - print_cycles > rte_get_timer_hz()) { - ssovf_log_dbg("\r%s: events %d", __func__, - rte_atomic32_read(count)); + ssovf_log_dbg("\r%s: events %u", __func__, cur_count); print_cycles = new_cycles; } if (new_cycles - cycles > rte_get_timer_hz() * 10) { ssovf_log_dbg( - "%s: No schedules for seconds, deadlock (%d)", - __func__, - rte_atomic32_read(count)); + "%s: No schedules for seconds, deadlock (%u)", + __func__, cur_count); rte_event_dev_dump(evdev, stdout); cycles = new_cycles; return -1; @@ -613,13 +613,13 @@ launch_workers_and_wait(int (*main_worker)(void *), int w_lcore; int ret; struct test_core_param *param; - rte_atomic32_t atomic_total_events; + RTE_ATOMIC(uint32_t) atomic_total_events; uint64_t dequeue_tmo_ticks; if (!nb_workers) return 0; - rte_atomic32_set(&atomic_total_events, total_events); + atomic_total_events = total_events; seqn_list_init(); param = malloc(sizeof(struct test_core_param) * nb_workers); @@ -889,10 +889,10 @@ worker_flow_based_pipeline(void *arg) uint16_t valid_event; uint8_t port = param->port; uint8_t new_sched_type = param->sched_type; - rte_atomic32_t *total_events = param->total_events; + __rte_atomic uint32_t *total_events = param->total_events; uint64_t dequeue_tmo_ticks = param->dequeue_tmo_ticks; - while (rte_atomic32_read(total_events) > 0) { + while (rte_atomic_load_explicit(total_events, rte_memory_order_relaxed) > 0) { valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, dequeue_tmo_ticks); if (!valid_event) @@ -910,7 +910,8 @@ worker_flow_based_pipeline(void *arg) } else if (ev.sub_event_type == 1) { /* Events from stage 1*/ if (seqn_list_update(*rte_event_pmd_selftest_seqn(ev.mbuf)) == 0) { rte_pktmbuf_free(ev.mbuf); - rte_atomic32_sub(total_events, 1); + rte_atomic_fetch_sub_explicit(total_events, 1, + rte_memory_order_release); } else { ssovf_log_dbg("Failed to update seqn_list"); return -1; @@ -1044,10 +1045,10 @@ worker_group_based_pipeline(void *arg) uint16_t valid_event; uint8_t port = param->port; uint8_t new_sched_type = param->sched_type; - rte_atomic32_t *total_events = param->total_events; + __rte_atomic uint32_t *total_events = param->total_events; uint64_t dequeue_tmo_ticks = param->dequeue_tmo_ticks; - while (rte_atomic32_read(total_events) > 0) { + while (rte_atomic_load_explicit(total_events, rte_memory_order_relaxed) > 0) { valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, dequeue_tmo_ticks); if (!valid_event) @@ -1065,7 +1066,8 @@ worker_group_based_pipeline(void *arg) } else if (ev.queue_id == 1) { /* Events from stage 1(group 1)*/ if (seqn_list_update(*rte_event_pmd_selftest_seqn(ev.mbuf)) == 0) { rte_pktmbuf_free(ev.mbuf); - rte_atomic32_sub(total_events, 1); + rte_atomic_fetch_sub_explicit(total_events, 1, + rte_memory_order_release); } else { ssovf_log_dbg("Failed to update seqn_list"); return -1; @@ -1203,16 +1205,17 @@ worker_flow_based_pipeline_max_stages_rand_sched_type(void *arg) struct rte_event ev; uint16_t valid_event; uint8_t port = param->port; - rte_atomic32_t *total_events = param->total_events; + __rte_atomic uint32_t *total_events = param->total_events; - while (rte_atomic32_read(total_events) > 0) { + while (rte_atomic_load_explicit(total_events, rte_memory_order_relaxed) > 0) { valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0); if (!valid_event) continue; if (ev.sub_event_type == 255) { /* last stage */ rte_pktmbuf_free(ev.mbuf); - rte_atomic32_sub(total_events, 1); + rte_atomic_fetch_sub_explicit(total_events, 1, + rte_memory_order_release); } else { ev.event_type = RTE_EVENT_TYPE_CPU; ev.sub_event_type++; @@ -1278,16 +1281,17 @@ worker_queue_based_pipeline_max_stages_rand_sched_type(void *arg) RTE_EVENT_DEV_ATTR_QUEUE_COUNT, &queue_count), "Queue count get failed"); uint8_t nr_queues = queue_count; - rte_atomic32_t *total_events = param->total_events; + __rte_atomic uint32_t *total_events = param->total_events; - while (rte_atomic32_read(total_events) > 0) { + while (rte_atomic_load_explicit(total_events, rte_memory_order_relaxed) > 0) { valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0); if (!valid_event) continue; if (ev.queue_id == nr_queues - 1) { /* last stage */ rte_pktmbuf_free(ev.mbuf); - rte_atomic32_sub(total_events, 1); + rte_atomic_fetch_sub_explicit(total_events, 1, + rte_memory_order_release); } else { ev.event_type = RTE_EVENT_TYPE_CPU; ev.queue_id++; @@ -1320,16 +1324,17 @@ worker_mixed_pipeline_max_stages_rand_sched_type(void *arg) RTE_EVENT_DEV_ATTR_QUEUE_COUNT, &queue_count), "Queue count get failed"); uint8_t nr_queues = queue_count; - rte_atomic32_t *total_events = param->total_events; + __rte_atomic uint32_t *total_events = param->total_events; - while (rte_atomic32_read(total_events) > 0) { + while (rte_atomic_load_explicit(total_events, rte_memory_order_relaxed) > 0) { valid_event = rte_event_dequeue_burst(evdev, port, &ev, 1, 0); if (!valid_event) continue; if (ev.queue_id == nr_queues - 1) { /* Last stage */ rte_pktmbuf_free(ev.mbuf); - rte_atomic32_sub(total_events, 1); + rte_atomic_fetch_sub_explicit(total_events, 1, + rte_memory_order_release); } else { ev.event_type = RTE_EVENT_TYPE_CPU; ev.queue_id++; -- 2.53.0