From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEBDCCDB481 for ; Wed, 24 Jun 2026 11:55:16 +0000 (UTC) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E3E8E40E19; Wed, 24 Jun 2026 13:53:50 +0200 (CEST) Received: from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166]) by mails.dpdk.org (Postfix) with ESMTP id AEB0740DD1; Wed, 24 Jun 2026 13:53:45 +0200 (CEST) X-QQ-mid: esmtpgz10t1782302022tf7ffff39 X-QQ-Originating-IP: 1NGsTleOhfgGu2Rn+96i8IuaD0ge6yqOXR80ScEj13E= Received: from DSK-zaiyuwang.trustnetic.com ( [115.204.248.247]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 24 Jun 2026 19:53:41 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 14119888732644786229 EX-QQ-RecipientCnt: 4 From: Zaiyu Wang To: dev@dpdk.org Cc: Zaiyu Wang , stable@dpdk.org, Jiawen Wu Subject: [PATCH v10 19/21] net/txgbe: fix to reset Tx write-back pointer Date: Wed, 24 Jun 2026 19:52:51 +0800 Message-Id: <20260624115254.20348-20-zaiyuwang@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20260624115254.20348-1-zaiyuwang@trustnetic.com> References: <20260423034024.14404-1-zaiyuwang@trustnetic.com> <20260624115254.20348-1-zaiyuwang@trustnetic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: esmtpgz:trustnetic.com:qybglogicsvrsz:qybglogicsvrsz3b-0 X-QQ-XMAILINFO: MKvWxcusrT3QFj2qLWxieKb2nO0WqhU1yE+WPCuKCeG8BScQS6Z5vyn0 CzoWpwvBpOrt5ebF+yQkWehkHdRH9VLqLDHjG2+s+d1/gdjDLOGYIab9DsOPIhh5aqciU5k JxZdpzyfPT9LkwzKe8ul1ECI/bVnHlfXZeYFUKqcPg3Vkh49jCD+Ztx099HHM3FkjYiRCVJ 7nV8Ji46dpqwDh/cz4aJtqJdtAo+N3mQQqjyksG0Tlno9+qusJ5+SUjANSV0olUyC2ceK0o Bgz8D4YU3BWUak8PShQnl2HJRJM2AJa5HUgb6XnLHYCHNSPWW5PBrRp0QvYsYAhviB6xM82 cF338xUiqfDA1pJ5VmQUbaUBWydR2RnK9n/1Vq/fXzVL/2EOhNC8yqUDnafT0tPH4Q3Ov52 IO8OjL2y1Y2sF6teEpw/vkf5HDixU9kaVv5GeSqld3lOawAr6h8QnljNX1iFO8mWPhlMeH0 saThlCd6OHFkEKLBgDQeZSyS3YP0nVxIJTLo8BHHhfj7moZH88GvhTzrIWInIwSo24jCXsj Hxwxj0s4GRQzQmODvCj9Onhk/Qorh6jWxLFscgH7wJq8h03SInRaDoLwrN/GGLpQjm1gyDl aqj5fKHsaZcNfgOBXweaJxGpcBDQb7vJoA4vAooOoZD/Qb/xqWy7CAnxEMEU3ATl3ePlPLa Qak16lcc7yL3yyj1+lZ7wwNOTD3TFvDaZI1gV20dJg7j0/+BrZn1BzdxAGTYVD2Ddtq6thP rI+qKNzQHJkdqZXnKmq7hv4Qm8F/Q2Pw+BlTR4l5KABTJ5KZUzAMA46KdKDEAw6mr84o1Xr tqKxWn5JmVJ33Pxg9SiURojLHRbPcKQXQh/BYjXDnE7iwAsCbEzHG+qokFPs1SJI+lD1b+y 1pSsY6t5jgyA7/LLsKiMfCMj7RkyGVcW1vz9jWweUyL2T2ab3lkzchd1zAYQteazauTSbZO vcMLad6oXTP+4rexwZFu2Jyi2rKM2OKin40Yn4C8I6UJqJ7jbGn7pO+vp8rteCRoVIrxN8S ObQdB3NdXXw8I3QopF8j0ILRn1Z76OkU19S9S32tijordOOV9rgD2QWCBoyuSknSMirhppw 5Eo3jM3HYa1u8enETrv7AGhR2jbkjpb09eqxQko+tmE2GTRg5b2fWU= X-QQ-XMRINFO: NS+P29fieYNwqS3WCnRCOn9D1NpZuCnCRA== X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The write-back pointer was not reset when the Tx queue was reset. This leads to the wrong Tx desc free logic. Move the resetting of pointer into txq->ops->reset(txq). Fixes: 8ada71d0bb7f ("net/txgbe: add Tx head write-back mode for Amber-Lite") Cc: stable@dpdk.org Signed-off-by: Zaiyu Wang --- drivers/net/txgbe/txgbe_rxtx.c | 45 +++++++++++++---------- drivers/net/txgbe/txgbe_rxtx.h | 1 + drivers/net/txgbe/txgbe_rxtx_vec_common.h | 7 ++++ 3 files changed, 33 insertions(+), 20 deletions(-) diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c index 42baaa3ab1..22a80e5553 100644 --- a/drivers/net/txgbe/txgbe_rxtx.c +++ b/drivers/net/txgbe/txgbe_rxtx.c @@ -2313,6 +2313,12 @@ txgbe_reset_tx_queue(struct txgbe_tx_queue *txq) txq->tx_next_dd = (uint16_t)(txq->tx_free_thresh - 1); txq->tx_tail = 0; + /* Zero out headwb_mem memory */ + if (txq->headwb_mem) { + for (i = 0; i < txq->headwb_size; i++) + txq->headwb_mem[i] = 0; + } + /* * Always allow 1 descriptor to be un-allocated to avoid * a H/W race condition @@ -2412,7 +2418,7 @@ txgbe_get_tx_port_offloads(struct rte_eth_dev *dev) return tx_offload_capa; } -static int +static void txgbe_setup_headwb_resources(struct rte_eth_dev *dev, void *tx_queue, unsigned int socket_id) @@ -2420,33 +2426,33 @@ txgbe_setup_headwb_resources(struct rte_eth_dev *dev, struct txgbe_hw *hw = TXGBE_DEV_HW(dev); const struct rte_memzone *headwb; struct txgbe_tx_queue *txq = tx_queue; - u8 i, headwb_size = 0; + u8 headwb_size = 0; - if (hw->mac.type != txgbe_mac_aml && hw->mac.type != txgbe_mac_aml40) { - txq->headwb_mem = NULL; - return 0; - } + if (hw->mac.type != txgbe_mac_aml && hw->mac.type != txgbe_mac_aml40) + goto out; + + if (!hw->devarg.tx_headwb) + goto out; - headwb_size = hw->devarg.tx_headwb_size; + headwb_size = txq->headwb_size; headwb = rte_eth_dma_zone_reserve(dev, "tx_headwb_mem", txq->queue_id, sizeof(u32) * headwb_size, TXGBE_ALIGN, socket_id); if (headwb == NULL) { - DEBUGOUT("Fail to setup headwb resources: no mem"); - txgbe_tx_queue_release(txq); - return -ENOMEM; + PMD_DRV_LOG(INFO, + "Failed to allocate headwb memory for Tx queue %u, change to SP mode", + txq->queue_id); + goto out; } txq->headwb = headwb; txq->headwb_dma = TMZ_PADDR(headwb); txq->headwb_mem = (RTE_ATOMIC(uint32_t) *)TMZ_VADDR(headwb); + return; - /* Zero out headwb_mem memory */ - for (i = 0; i < headwb_size; i++) - txq->headwb_mem[i] = 0; - - return 0; +out: + txq->headwb_mem = NULL; } int __rte_cold @@ -2542,6 +2548,7 @@ txgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, txq->offloads = offloads; txq->ops = &def_txq_ops; txq->tx_deferred_start = tx_conf->tx_deferred_start; + txq->headwb_size = hw->devarg.tx_headwb_size; #ifdef RTE_LIB_SECURITY txq->using_ipsec = !!(dev->data->dev_conf.txmode.offloads & RTE_ETH_TX_OFFLOAD_SECURITY); @@ -2577,8 +2584,7 @@ txgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, /* set up scalar TX function as appropriate */ txgbe_set_tx_function(dev, txq); - if (hw->devarg.tx_headwb) - err = txgbe_setup_headwb_resources(dev, txq, socket_id); + txgbe_setup_headwb_resources(dev, txq, socket_id); txq->ops->reset(txq); txq->desc_error = 0; @@ -4755,15 +4761,14 @@ txgbe_dev_tx_init(struct rte_eth_dev *dev) wr32(hw, TXGBE_TXRP(txq->reg_idx), 0); wr32(hw, TXGBE_TXWP(txq->reg_idx), 0); - if ((hw->mac.type == txgbe_mac_aml || hw->mac.type == txgbe_mac_aml40) && - hw->devarg.tx_headwb) { + if (txq->headwb_mem) { uint32_t txdctl; wr32(hw, TXGBE_PX_TR_HEAD_ADDRL(txq->reg_idx), (uint32_t)(txq->headwb_dma & BIT_MASK32)); wr32(hw, TXGBE_PX_TR_HEAD_ADDRH(txq->reg_idx), (uint32_t)(txq->headwb_dma >> 32)); - if (hw->devarg.tx_headwb_size == 16) + if (txq->headwb_size == 16) txdctl = TXGBE_PX_TR_CFG_HEAD_WB | TXGBE_PX_TR_CFG_HEAD_WB_64BYTE; else diff --git a/drivers/net/txgbe/txgbe_rxtx.h b/drivers/net/txgbe/txgbe_rxtx.h index 9b0fffae8e..e125eb7034 100644 --- a/drivers/net/txgbe/txgbe_rxtx.h +++ b/drivers/net/txgbe/txgbe_rxtx.h @@ -416,6 +416,7 @@ struct txgbe_tx_queue { uint64_t desc_error; bool resetting; const struct rte_memzone *headwb; + uint16_t headwb_size; uint64_t headwb_dma; RTE_ATOMIC(uint32_t) *headwb_mem; }; diff --git a/drivers/net/txgbe/txgbe_rxtx_vec_common.h b/drivers/net/txgbe/txgbe_rxtx_vec_common.h index 77d7ff785b..6e561aff30 100644 --- a/drivers/net/txgbe/txgbe_rxtx_vec_common.h +++ b/drivers/net/txgbe/txgbe_rxtx_vec_common.h @@ -252,6 +252,13 @@ _txgbe_reset_tx_queue_vec(struct txgbe_tx_queue *txq) txq->tx_next_dd = (uint16_t)(txq->tx_free_thresh - 1); txq->tx_tail = 0; + + /* Zero out headwb_mem memory */ + if (txq->headwb_mem) { + for (i = 0; i < txq->headwb_size; i++) + txq->headwb_mem[i] = 0; + } + /* * Always allow 1 descriptor to be un-allocated to avoid * a H/W race condition -- 2.21.0.windows.1