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[204.195.96.226]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-31504b15f77sm13111562eec.4.2026.07.29.10.57.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jul 2026 10:57:38 -0700 (PDT) From: Stephen Hemminger To: dev@dpdk.org Cc: Stephen Hemminger , Gagandeep Singh , Hemant Agrawal Subject: [RFC 19/32] crypto/caam_jr: use IO barrier before job ring doorbell Date: Wed, 29 Jul 2026 10:54:12 -0700 Message-ID: <20260729175715.165120-20-stephen@networkplumber.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260729175715.165120-1-stephen@networkplumber.org> References: <20260729175715.165120-1-stephen@networkplumber.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The barrier orders the input ring descriptor write in DMA memory against the MMIO doorbell write. That is device ordering, not SMP ordering: rte_io_wmb() is the correct barrier, and on arm64 the inner shareable dmb the SMP barrier generated was not sufficient to order against the device in the first place. Signed-off-by: Stephen Hemminger --- drivers/crypto/caam_jr/caam_jr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/caam_jr/caam_jr.c b/drivers/crypto/caam_jr/caam_jr.c index 1f97e72337..7a345c436e 100644 --- a/drivers/crypto/caam_jr/caam_jr.c +++ b/drivers/crypto/caam_jr/caam_jr.c @@ -1451,7 +1451,8 @@ caam_jr_enqueue_op(struct rte_crypto_op *op, struct caam_jr_qp *qp) /* Set ptr in input ring to current descriptor */ sec_write_addr(&ring->input_ring[ring->pidx], (phys_addr_t)caam_jr_vtop_ctx(ctx, ctx->jobdes.desc)); - rte_smp_wmb(); + /* Descriptor must be visible to the device before the doorbell */ + rte_io_wmb(); /* Notify HW that a new job is enqueued */ hw_enqueue_desc_on_job_ring(ring); -- 2.53.0