From: Rongwei Liu <rongweil@nvidia.com>
To: <dev@dpdk.org>, <matan@nvidia.com>, <viacheslavo@nvidia.com>,
<orika@nvidia.com>, <suanmingm@nvidia.com>, <thomas@monjalon.net>
Cc: <stable@dpdk.org>, Gregory Etelson <getelson@nvidia.com>,
"Dariusz Sosnowski" <dsosnowski@nvidia.com>,
Bing Zhao <bingz@nvidia.com>
Subject: [PATCH v1] net/mlx5: fix aggr affinity pattern create failures
Date: Mon, 3 Aug 2026 12:05:52 +0300 [thread overview]
Message-ID: <20260803090629.1758028-1-rongweil@nvidia.com> (raw)
The mlx5 PMD attempts to validate the pattern template
by creating an internal table under group non-zero.
Aggr_affinity is only supported under root table and skip
its validation. Table create still fails due to definer
translation error.
Fixes: 80c676259a04 ("net/mlx5: validate HWS template items")
Cc: stable@dpdk.org
Cc: Gregory Etelson <getelson@nvidia.com>
Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
drivers/net/mlx5/mlx5_flow_hw.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index 1cffdcc54d..30ef2f1c2d 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -9588,7 +9588,8 @@ flow_hw_pattern_template_create(struct rte_eth_dev *dev,
}
}
rte_atomic_fetch_add_explicit(&it->refcnt, 1, rte_memory_order_relaxed);
- if (external) {
+ /* AGGR_AFFINITY only supports under group 0 */
+ if (external && !(it->item_flags & MLX5_FLOW_ITEM_AGGR_AFFINITY)) {
rc = pattern_template_validate(dev, &it, 1, error);
if (rc)
goto error;
--
2.53.0
reply other threads:[~2026-08-03 9:07 UTC|newest]
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