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[204.195.96.226]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-315863b0c61sm23301631eec.6.2026.08.05.20.26.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Aug 2026 20:26:01 -0700 (PDT) From: Stephen Hemminger To: dev@dpdk.org Cc: Stephen Hemminger Subject: [PATCH v7 13/24] event/sw: convert from rte_atomic32 to stdatomic Date: Wed, 5 Aug 2026 20:23:05 -0700 Message-ID: <20260806032544.21337-14-stephen@networkplumber.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260806032544.21337-1-stephen@networkplumber.org> References: <20260521042043.1590536-1-stephen@networkplumber.org> <20260806032544.21337-1-stephen@networkplumber.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Use stdatomic to keep track of inflights. Signed-off-by: Stephen Hemminger --- drivers/event/sw/sw_evdev.c | 8 +++++--- drivers/event/sw/sw_evdev.h | 4 ++-- drivers/event/sw/sw_evdev_worker.c | 16 +++++++++++----- 3 files changed, 18 insertions(+), 10 deletions(-) diff --git a/drivers/event/sw/sw_evdev.c b/drivers/event/sw/sw_evdev.c index 3ad82e94ac..a2f760a98d 100644 --- a/drivers/event/sw/sw_evdev.c +++ b/drivers/event/sw/sw_evdev.c @@ -153,7 +153,9 @@ sw_port_setup(struct rte_eventdev *dev, uint8_t port_id, * the sum to no leak credits */ int possible_inflights = p->inflight_credits + p->inflights; - rte_atomic32_sub(&sw->inflights, possible_inflights); + rte_atomic_fetch_sub_explicit(&sw->inflights, + possible_inflights, + rte_memory_order_release); } *p = (struct sw_port){0}; /* zero entire structure */ @@ -512,7 +514,7 @@ sw_dev_configure(const struct rte_eventdev *dev) sw->qid_count = conf->nb_event_queues; sw->port_count = conf->nb_event_ports; sw->nb_events_limit = conf->nb_events_limit; - rte_atomic32_set(&sw->inflights, 0); + sw->inflights = 0; /* Number of chunks sized for worst-case spread of events across IQs */ num_chunks = ((SW_INFLIGHT_EVENTS_TOTAL/SW_EVS_PER_Q_CHUNK)+1) + @@ -633,7 +635,7 @@ sw_dump(struct rte_eventdev *dev, FILE *f) fprintf(f, "\tsched cq/qid call: %"PRIu64"\n", sw->sched_cq_qid_called); fprintf(f, "\tsched no IQ enq: %"PRIu64"\n", sw->sched_no_iq_enqueues); fprintf(f, "\tsched no CQ enq: %"PRIu64"\n", sw->sched_no_cq_enqueues); - uint32_t inflights = rte_atomic32_read(&sw->inflights); + uint32_t inflights = rte_atomic_load_explicit(&sw->inflights, rte_memory_order_relaxed); uint32_t credits = sw->nb_events_limit - inflights; fprintf(f, "\tinflight %d, credits: %d\n", inflights, credits); diff --git a/drivers/event/sw/sw_evdev.h b/drivers/event/sw/sw_evdev.h index c159be21be..5e49b08030 100644 --- a/drivers/event/sw/sw_evdev.h +++ b/drivers/event/sw/sw_evdev.h @@ -8,7 +8,7 @@ #include "sw_evdev_log.h" #include #include -#include +#include #define SW_DEFAULT_CREDIT_QUANTA 32 #define SW_DEFAULT_SCHED_QUANTA 128 @@ -233,7 +233,7 @@ struct sw_evdev { /* Contains all ports - load balanced and directed */ alignas(RTE_CACHE_LINE_SIZE) struct sw_port ports[SW_PORTS_MAX]; - alignas(RTE_CACHE_LINE_SIZE) rte_atomic32_t inflights; + alignas(RTE_CACHE_LINE_SIZE) RTE_ATOMIC(uint32_t) inflights; /* * max events in this instance. Cached here for performance. diff --git a/drivers/event/sw/sw_evdev_worker.c b/drivers/event/sw/sw_evdev_worker.c index 4215726513..0755def367 100644 --- a/drivers/event/sw/sw_evdev_worker.c +++ b/drivers/event/sw/sw_evdev_worker.c @@ -56,7 +56,7 @@ sw_event_enqueue_burst(void *port, const struct rte_event ev[], uint16_t num) uint8_t new_ops[PORT_ENQUEUE_MAX_BURST_SIZE]; struct sw_port *p = port; struct sw_evdev *sw = (void *)p->sw; - uint32_t sw_inflights = rte_atomic32_read(&sw->inflights); + uint32_t sw_inflights = rte_atomic_load_explicit(&sw->inflights, rte_memory_order_relaxed); uint32_t credit_update_quanta = sw->credit_update_quanta; int new = 0; @@ -74,8 +74,10 @@ sw_event_enqueue_burst(void *port, const struct rte_event ev[], uint16_t num) if (sw_inflights + credit_update_quanta > sw->nb_events_limit) return 0; - rte_atomic32_add(&sw->inflights, credit_update_quanta); - p->inflight_credits += (credit_update_quanta); + rte_atomic_fetch_add_explicit(&sw->inflights, + credit_update_quanta, + rte_memory_order_acquire); + p->inflight_credits += credit_update_quanta; /* If there are fewer inflight credits than new events, limit * the number of enqueued events. @@ -124,7 +126,9 @@ sw_event_enqueue_burst(void *port, const struct rte_event ev[], uint16_t num) /* Replenish credits if enough releases are performed */ if (p->inflight_credits >= credit_update_quanta * 2) { - rte_atomic32_sub(&sw->inflights, credit_update_quanta); + rte_atomic_fetch_sub_explicit(&sw->inflights, + credit_update_quanta, + rte_memory_order_release); p->inflight_credits -= credit_update_quanta; } @@ -150,7 +154,9 @@ sw_event_dequeue_burst(void *port, struct rte_event *ev, uint16_t num, /* Replenish credits if enough releases are performed */ if (p->inflight_credits >= credit_update_quanta * 2) { - rte_atomic32_sub(&sw->inflights, credit_update_quanta); + rte_atomic_fetch_sub_explicit(&sw->inflights, + credit_update_quanta, + rte_memory_order_release); p->inflight_credits -= credit_update_quanta; } } -- 2.53.0