From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by smtp.lore.kernel.org (Postfix) with ESMTP id 401E4C5DF7E for ; Tue, 18 Aug 2026 11:18:18 +0000 (UTC) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8234640A71; Tue, 18 Aug 2026 13:17:47 +0200 (CEST) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by mails.dpdk.org (Postfix) with ESMTP id C732440696 for ; Tue, 18 Aug 2026 13:17:43 +0200 (CEST) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id A98BC1A0118; Tue, 18 Aug 2026 13:17:43 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 735701A010E; Tue, 18 Aug 2026 13:17:43 +0200 (CEST) Received: from lsv03583.swis.in-blr01.nxp.com (lsv03583.swis.in-blr01.nxp.com [92.120.146.12]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id E88251800224; Tue, 18 Aug 2026 19:17:41 +0800 (+08) From: Hemant Agrawal To: stephen@networkplumber.org, thomas@monjalon.net, dev@dpdk.org Cc: Prashant Gupta Subject: [PATCH v12 06/26] drivers: add process-type guards for secondary process Date: Tue, 18 Aug 2026 16:47:10 +0530 Message-Id: <20260818111730.801760-7-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260818111730.801760-1-hemant.agrawal@nxp.com> References: <20260813144205.2505031-1-hemant.agrawal@nxp.com> <20260818111730.801760-1-hemant.agrawal@nxp.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Virus-Scanned: ClamAV using ClamSMTP X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Prashant Gupta Add RTE_PROC_PRIMARY checks in device initialization paths for dma/dpaa and net/dpaa rivers. Secondary processes should skip hardware initialization to prevent segfaults when accessing hardware registers that are only mapped in the primary process. Signed-off-by: Prashant Gupta --- drivers/dma/dpaa/dpaa_qdma.c | 3 +++ drivers/net/dpaa/dpaa_ethdev.c | 6 +++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/dma/dpaa/dpaa_qdma.c b/drivers/dma/dpaa/dpaa_qdma.c index e2cb157c43..3981bf277e 100644 --- a/drivers/dma/dpaa/dpaa_qdma.c +++ b/drivers/dma/dpaa/dpaa_qdma.c @@ -1351,6 +1351,9 @@ dpaa_qdma_init(struct rte_dma_dev *dmadev) int ret; uint32_t i, j, k; + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return 0; + if (dpaa_get_devargs(dmadev->device->devargs, DPAA_DMA_ERROR_CHECK)) { s_hw_err_check = true; DPAA_QDMA_INFO("Enable DMA error checks"); diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c index 86b1675c29..85dae9070c 100644 --- a/drivers/net/dpaa/dpaa_ethdev.c +++ b/drivers/net/dpaa/dpaa_ethdev.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. - * Copyright 2017-2020,2022-2025 NXP + * Copyright 2017-2020,2022-2026 NXP * */ /* System headers */ @@ -2682,6 +2682,10 @@ rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev) PMD_INIT_FUNC_TRACE(); eth_dev = rte_eth_dev_allocated(dpaa_dev->device.name); + + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return eth_dev ? rte_eth_dev_release_port(eth_dev) : 0; + if (eth_dev && eth_dev->state != RTE_ETH_DEV_UNUSED) { int close_ret = dpaa_eth_dev_close(eth_dev); -- 2.25.1