From: Vamsi Krishna <vattunuru@marvell.com>
To: <dev@dpdk.org>, <vattunuru@marvell.com>
Cc: <jerinj@marvell.com>, <fengchengwen@huawei.com>,
<ndabilpuram@marvell.com>
Subject: [PATCH v0 3/3] dma/cnxk: enable inter process domain DMA support
Date: Sat, 29 Aug 2026 16:24:09 +0530 [thread overview]
Message-ID: <20260829105409.1160766-4-vattunuru@marvell.com> (raw)
In-Reply-To: <20260829105409.1160766-1-vattunuru@marvell.com>
From: Vamsi Attunuru <vattunuru@marvell.com>
Adds support for inter domain DMA operations.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
---
drivers/dma/cnxk/cnxk_dmadev.c | 148 ++++++++++++++++++++++++++++++++-
drivers/dma/cnxk/cnxk_dmadev.h | 1 +
2 files changed, 148 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 3970abe1c3..faa13abc23 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -98,7 +98,7 @@ cnxk_dmadev_info_get(const struct rte_dma_dev *dev, struct rte_dma_info *dev_inf
dev_info->min_desc = CN20K_DPI_MIN_DESC;
dev_info->max_sges = CN20K_DPI_MAX_POINTER;
dev_info->max_vchans = dpivf->max_vchans;
- dev_info->dev_capa |= RTE_DMA_CAPA_OPS_FILL;
+ dev_info->dev_capa |= (RTE_DMA_CAPA_OPS_FILL | RTE_DMA_CAPA_INTER_PROCESS_DOMAIN);
} else {
dev_info->max_desc = CNXK_DPI_MAX_DESC;
dev_info->min_desc = CNXK_DPI_MIN_DESC;
@@ -446,6 +446,13 @@ cn20k_dmadev_setup(struct cnxk_dpi_vf_s *dpivf, uint16_t vchan,
break;
case RTE_DMA_DIR_MEM_TO_MEM:
dpi_conf->cfg.xtype = DPI_XTYPE_INTERNAL_ONLY;
+ if (conf->domain.type == RTE_DMA_INTER_PROCESS_DOMAIN) {
+ dpi_conf->chan_cfg.type = RTE_DMA_INTER_PROCESS_DOMAIN;
+ dpi_conf->chan_cfg.src_key = conf->domain.src_handler;
+ dpi_conf->chan_cfg.dst_key = conf->domain.dst_handler;
+ header->cn20k.chan = CNXK_DPI_SRC_DST_KEY(dpi_conf->chan_cfg.src_key,
+ dpi_conf->chan_cfg.dst_key);
+ }
dpi_conf->cfg.rport = 0;
dpi_conf->cfg.wport = 0;
break;
@@ -1015,6 +1022,140 @@ cnxk_set_fp_ops(struct rte_dma_dev *dev, uint8_t ena_enq_deq)
}
}
+static int
+cnxk_dmadev_access_pair_group_create(const struct rte_dma_dev *dev, rte_uuid_t domain_id,
+ rte_uuid_t token, int16_t *group_id,
+ rte_dma_access_pair_group_event_cb_t cb)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+ struct roc_dpi_lf *lf;
+ int rc;
+
+ RTE_SET_USED(cb);
+
+ if (!roc_model_is_cn20k())
+ return -ENOTSUP;
+
+ if (dpivf->rdpi.lfs == NULL || dpivf->rdpi.nr_lfs == 0) {
+ plt_err("DPI LF resources are not initialized");
+ return -EINVAL;
+ }
+
+ lf = &(dpivf->rdpi.lfs[0]);
+
+ rc = roc_dpi_access_pair_group_create(lf, domain_id, token, group_id);
+
+ return rc;
+}
+
+static int
+cnxk_dmadev_access_pair_group_destroy(const struct rte_dma_dev *dev, int16_t group_id)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+ struct roc_dpi_lf *lf;
+ int rc;
+
+ if (!roc_model_is_cn20k())
+ return -ENOTSUP;
+
+ if (dpivf->rdpi.lfs == NULL || dpivf->rdpi.nr_lfs == 0) {
+ plt_err("DPI LF resources are not initialized");
+ return -EINVAL;
+ }
+
+ lf = &(dpivf->rdpi.lfs[0]);
+
+ if (lf->group_id != group_id) {
+ plt_err("Invalid access pair group is passed");
+ return -EINVAL;
+ }
+
+ rc = roc_dpi_access_pair_group_destroy(lf, group_id);
+
+ return rc;
+}
+
+static int
+cnxk_dmadev_access_pair_group_join(const struct rte_dma_dev *dev, rte_uuid_t domain_id,
+ rte_uuid_t token, int16_t group_id,
+ rte_dma_access_pair_group_event_cb_t cb)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+ struct roc_dpi_lf *lf;
+ int rc;
+
+ RTE_SET_USED(cb);
+
+ if (!roc_model_is_cn20k())
+ return -ENOTSUP;
+
+ if (dpivf->rdpi.lfs == NULL || dpivf->rdpi.nr_lfs == 0) {
+ plt_err("DPI LF resources are not initialized");
+ return -EINVAL;
+ }
+
+ lf = &(dpivf->rdpi.lfs[0]);
+
+ rc = roc_dpi_access_pair_group_join(lf, domain_id, token, group_id);
+
+ return rc;
+}
+
+static int
+cnxk_dmadev_access_pair_group_leave(const struct rte_dma_dev *dev, int16_t group_id)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+ struct roc_dpi_lf *lf;
+ int rc;
+
+ if (!roc_model_is_cn20k())
+ return -ENOTSUP;
+
+ if (dpivf->rdpi.lfs == NULL || dpivf->rdpi.nr_lfs == 0) {
+ plt_err("DPI LF resources are not initialized");
+ return -EINVAL;
+ }
+
+ lf = &(dpivf->rdpi.lfs[0]);
+
+ if (lf->group_id != group_id) {
+ plt_err("Invalid access pair group is passed");
+ return -EINVAL;
+ }
+
+ rc = roc_dpi_access_pair_group_leave(lf, group_id);
+
+ return rc;
+}
+
+static int
+cnxk_dmadev_access_pair_group_handler_get(const struct rte_dma_dev *dev, int16_t group_id,
+ rte_uuid_t domain_id, uint16_t *handler)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+ struct roc_dpi_lf *lf;
+ int rc;
+
+ if (!roc_model_is_cn20k())
+ return -ENOTSUP;
+
+ if (dpivf->rdpi.lfs == NULL || dpivf->rdpi.nr_lfs == 0) {
+ plt_err("DPI LF resources are not initialized");
+ return -EINVAL;
+ }
+
+ lf = &(dpivf->rdpi.lfs[0]);
+
+ if (lf->group_id != group_id) {
+ plt_err("Invalid access pair group is passed");
+ return -EINVAL;
+ }
+
+ rc = roc_dpi_access_pair_group_handler_get(lf, group_id, domain_id, handler);
+
+ return rc;
+}
+
static const struct rte_dma_dev_ops cnxk_dmadev_ops = {
.dev_close = cnxk_dmadev_close,
.dev_configure = cnxk_dmadev_configure,
@@ -1024,6 +1165,11 @@ static const struct rte_dma_dev_ops cnxk_dmadev_ops = {
.stats_get = cnxk_stats_get,
.stats_reset = cnxk_stats_reset,
.vchan_setup = cnxk_dmadev_vchan_setup,
+ .access_pair_group_create = cnxk_dmadev_access_pair_group_create,
+ .access_pair_group_destroy = cnxk_dmadev_access_pair_group_destroy,
+ .access_pair_group_join = cnxk_dmadev_access_pair_group_join,
+ .access_pair_group_leave = cnxk_dmadev_access_pair_group_leave,
+ .access_pair_group_handler_get = cnxk_dmadev_access_pair_group_handler_get,
};
static int
diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h
index 3ba404dda8..043f48cb7e 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.h
+++ b/drivers/dma/cnxk/cnxk_dmadev.h
@@ -47,6 +47,7 @@
CNXK_DPI_MAX_POINTER)
#define CNXK_DPI_CHUNKS_FROM_DESC(cz, desc) (((desc) / (((cz) / 8) / CNXK_DPI_MAX_CMD_SZ)) + 1)
#define CNXK_DPI_COMPL_OFFSET ROC_CACHE_LINE_SZ
+#define CNXK_DPI_SRC_DST_KEY(src, dst) ((0x2040) | ((src & 0x3F) << 7) | (dst & 0x3F))
#define CN20K_DPI_MAX_POINTER 4
#define CN20K_DPI_MAX_DESC 2048
--
2.34.1
prev parent reply other threads:[~2026-08-29 10:54 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-29 10:54 [PATCH v0 0/3] dma/cnxk: add CN20K (O20) DPI DMA and inter-process domain support Vamsi Krishna
2026-08-29 10:54 ` [PATCH v0 1/3] common/cnxk: add O20 DPI DMA support Vamsi Krishna
2026-08-29 10:54 ` [PATCH v0 2/3] dma/cnxk: " Vamsi Krishna
2026-08-29 10:54 ` Vamsi Krishna [this message]
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