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[204.195.112.43]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39e6c37a88csm10088091a91.8.2026.09.20.11.13.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Sep 2026 11:13:56 -0700 (PDT) From: Stephen Hemminger To: dev@dpdk.org Cc: Stephen Hemminger , Long Li , Wei Hu Subject: [PATCH v2 05/33] bus/vmbus: replace SMP barriers with C11 memory fences Date: Sun, 20 Sep 2026 11:09:57 -0700 Message-ID: <20260920181347.747210-6-stephen@networkplumber.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260920181347.747210-1-stephen@networkplumber.org> References: <20260729175715.165120-1-stephen@networkplumber.org> <20260920181347.747210-1-stephen@networkplumber.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Full barriers order the preceding index store against the following load of the interrupt mask or pending size and stay seq_cst; read barriers become acquire fences. Same code generated on x86 and arm64. The write barrier before publishing the transmit index becomes a release fence. Nominally stronger on arm64, but it is immediately followed by a full barrier cmpset; converting that to a release compare-exchange is left for the rte_atomic32 removal series. Signed-off-by: Stephen Hemminger Reviewed-by: Long Li --- drivers/bus/vmbus/vmbus_bufring.c | 6 +++--- drivers/bus/vmbus/vmbus_channel.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/bus/vmbus/vmbus_bufring.c b/drivers/bus/vmbus/vmbus_bufring.c index f622869974..31478d3bfa 100644 --- a/drivers/bus/vmbus/vmbus_bufring.c +++ b/drivers/bus/vmbus/vmbus_bufring.c @@ -58,11 +58,11 @@ void vmbus_br_setup(struct vmbus_br *br, void *buf, unsigned int blen) static inline bool vmbus_txbr_need_signal(const struct vmbus_bufring *vbr, uint32_t old_windex) { - rte_smp_mb(); + rte_atomic_thread_fence(rte_memory_order_seq_cst); if (vbr->imask) return false; - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); /* * This is the only case we need to signal when the @@ -158,7 +158,7 @@ vmbus_txbr_write(struct vmbus_br *tbr, const struct iovec iov[], int iovlen, RTE_ASSERT(windex == next_windex); /* Ensure that data is available before updating host index */ - rte_smp_wmb(); + rte_atomic_thread_fence(rte_memory_order_release); /* Checkin for our reservation. wait for our turn to update host */ while (!rte_atomic32_cmpset(&vbr->windex, old_windex, next_windex)) diff --git a/drivers/bus/vmbus/vmbus_channel.c b/drivers/bus/vmbus/vmbus_channel.c index 2648d8e3fd..10293f59be 100644 --- a/drivers/bus/vmbus/vmbus_channel.c +++ b/drivers/bus/vmbus/vmbus_channel.c @@ -211,7 +211,7 @@ bool rte_vmbus_chan_rx_empty(const struct vmbus_channel *channel) { const struct vmbus_br *br = &channel->rxbr; - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); return br->vbr->rindex == br->vbr->windex; } @@ -229,13 +229,13 @@ void rte_vmbus_chan_signal_read(struct rte_vmbus_device *dev, return; /* Make sure reading of pending happens after new read index */ - rte_smp_mb(); + rte_atomic_thread_fence(rte_memory_order_seq_cst); pending_sz = rbr->vbr->pending_send; if (!pending_sz) return; - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); write_sz = vmbus_br_availwrite(rbr, rbr->vbr->windex); /* If there was space before then host was not blocked */ -- 2.53.0