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[204.195.112.43]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39e6c37a88csm10088091a91.8.2026.09.20.11.13.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Sep 2026 11:13:58 -0700 (PDT) From: Stephen Hemminger To: dev@dpdk.org Cc: Stephen Hemminger , Nicolas Chautru Subject: [PATCH v2 06/33] drivers/baseband: convert rte_smp_rmb to fence Date: Sun, 20 Sep 2026 11:09:58 -0700 Message-ID: <20260920181347.747210-7-stephen@networkplumber.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260920181347.747210-1-stephen@networkplumber.org> References: <20260729175715.165120-1-stephen@networkplumber.org> <20260920181347.747210-1-stephen@networkplumber.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Replace deprecated rte_smp_rmb with equivalent rte_atomic_thread_fence(rte_memory_order_acquire). Signed-off-by: Stephen Hemminger --- drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c | 8 ++++---- drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 12 ++++++------ 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c index 45bd171ca7..e804be4cea 100644 --- a/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c +++ b/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c @@ -2662,7 +2662,7 @@ vc_5gnr_dequeue_ldpc_enc_one_op_cb(struct fpga_5gnr_queue *q, struct rte_bbdev_e return -1; /* make sure the response is read atomically */ - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); rte_bbdev_log_debug("DMA response desc %p", desc); @@ -2691,7 +2691,7 @@ agx100_dequeue_ldpc_enc_one_op_cb(struct fpga_5gnr_queue *q, struct rte_bbdev_en return -1; /* make sure the response is read atomically. */ - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); rte_bbdev_log_debug("DMA response desc %p", desc); @@ -2723,7 +2723,7 @@ vc_5gnr_dequeue_ldpc_dec_one_op_cb(struct fpga_5gnr_queue *q, struct rte_bbdev_d return -1; /* make sure the response is read atomically */ - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); #ifdef RTE_LIBRTE_BBDEV_DEBUG vc_5gnr_print_dma_dec_desc_debug_info(desc); @@ -2769,7 +2769,7 @@ agx100_dequeue_ldpc_dec_one_op_cb(struct fpga_5gnr_queue *q, struct rte_bbdev_de return -1; /* make sure the response is read atomically. */ - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); #ifdef RTE_LIBRTE_BBDEV_DEBUG agx100_print_dma_dec_desc_debug_info(desc); diff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c index 04ac445820..cb3f29c10b 100644 --- a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c +++ b/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c @@ -2093,7 +2093,7 @@ dequeue_enc_one_op_cb(struct fpga_queue *q, struct rte_bbdev_enc_op **op, return -1; /* make sure the response is read atomically */ - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); rte_bbdev_log_debug("DMA response desc %p", desc); @@ -2123,7 +2123,7 @@ dequeue_enc_one_op_tb(struct fpga_queue *q, struct rte_bbdev_enc_op **op, return -1; /* Make sure the response is read atomically */ - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); /* Verify if done bit in all CBs is set */ cbs_in_op = desc->enc_req.cbs_in_op; @@ -2135,7 +2135,7 @@ dequeue_enc_one_op_tb(struct fpga_queue *q, struct rte_bbdev_enc_op **op, } /* Make sure the response is read atomically */ - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); for (cb_idx = 0; cb_idx < cbs_in_op; ++cb_idx) { desc = q->ring_addr + ((q->head_free_desc + desc_offset + @@ -2166,7 +2166,7 @@ dequeue_dec_one_op_cb(struct fpga_queue *q, struct rte_bbdev_dec_op **op, return -1; /* make sure the response is read atomically */ - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); #ifdef RTE_LIBRTE_BBDEV_DEBUG print_dma_dec_desc_debug_info(desc); @@ -2201,7 +2201,7 @@ dequeue_dec_one_op_tb(struct fpga_queue *q, struct rte_bbdev_dec_op **op, return -1; /* Make sure the response is read atomically */ - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); /* Verify if done bit in all CBs is set */ cbs_in_op = desc->dec_req.cbs_in_op; @@ -2213,7 +2213,7 @@ dequeue_dec_one_op_tb(struct fpga_queue *q, struct rte_bbdev_dec_op **op, } /* Make sure the response is read atomically */ - rte_smp_rmb(); + rte_atomic_thread_fence(rte_memory_order_acquire); for (cb_idx = 0; cb_idx < cbs_in_op; ++cb_idx) { desc = q->ring_addr + ((q->head_free_desc + desc_offset + -- 2.53.0