From: Maayan Kashani <mkashani@nvidia.com>
To: <dev@dpdk.org>
Cc: <rasland@nvidia.com>, <dsosnowski@nvidia.com>,
<viacheslavo@nvidia.com>, <bingz@nvidia.com>, <orika@nvidia.com>,
<suanmingm@nvidia.com>, <matan@nvidia.com>,
Maayan Kashani <mkashani@nvidia.com>
Subject: [PATCH] doc: add root table encap and decap limitation in mlx5 guide
Date: Mon, 9 Nov 2026 15:35:18 +0200 [thread overview]
Message-ID: <20261109133518.4042113-1-mkashani@nvidia.com> (raw)
With HW steering, tunnel encapsulation on the root table is supported
only on egress, and tunnel decapsulation only on ingress. This matches
the root packet-reformat validation in the kernel.
Signed-off-by: Maayan Kashani <mkashani@nvidia.com>
Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
---
doc/guides/nics/mlx5.rst | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 86fe747c166..45efa76bcfe 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -3048,6 +3048,11 @@ Limitations
#. The decapsulation is always done up to the outermost tunnel detected by the HW.
+#. With :ref:`HW steering <mlx5_hws>`, on the HW root table:
+
+ - Encapsulating traffic into an L2 or L3 tunnel is supported only on egress.
+ - Decapsulating an L2 or L3 tunnel is supported only on ingress.
+
.. _mlx5_modify:
--
2.25.1
next reply other threads:[~2026-11-09 13:37 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-09 13:35 Maayan Kashani [this message]
2026-11-11 13:11 ` [PATCH] doc: add root table encap and decap limitation in mlx5 guide Raslan Darawsheh
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