From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Monjalon Subject: Re: [PATCH v2] ip_pipeline: fix false cacheline sharing among threads Date: Tue, 14 Jun 2016 21:13:52 +0200 Message-ID: <2051818.XZUsO1yvAA@xps13> References: <1465658356-59012-1-git-send-email-jasvinder.singh@intel.com> <1465735367-187704-1-git-send-email-jasvinder.singh@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Cc: dev@dpdk.org, cristian.dumitrescu@intel.com To: Jasvinder Singh Return-path: Received: from mail-wm0-f41.google.com (mail-wm0-f41.google.com [74.125.82.41]) by dpdk.org (Postfix) with ESMTP id B24F39A81 for ; Tue, 14 Jun 2016 21:13:53 +0200 (CEST) Received: by mail-wm0-f41.google.com with SMTP id v199so134487836wmv.0 for ; Tue, 14 Jun 2016 12:13:53 -0700 (PDT) In-Reply-To: <1465735367-187704-1-git-send-email-jasvinder.singh@intel.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 2016-06-12 13:42, Jasvinder Singh: > In ip_pipeline app, the structure app_thread_data needs to be aligned to > the cache line boundary as threads on different cpu cores are accessing > fields of the app->thread_data and having this structure not aligned on > cacheline boundary leads to false cacheline sharing. > > Fixes: 7f64b9c004aa ("examples/ip_pipeline: rework config file syntax") > > Signed-off-by: Jasvinder Singh > Acked-by: Cristian Dumitrescu Applied, thanks