From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Monjalon Subject: Re: [PATCH v2] ring: use aligned memzone allocation Date: Sat, 01 Jul 2017 13:25:44 +0200 Message-ID: <2142730.5CIpsl7KM1@xps> References: <20170602200337.50743-1-daniel.verkamp@intel.com> <20170630133602.63d4f9ca@platinum> <4057935.qMb1xRYjf6@xps> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Cc: dev@dpdk.org, stable@dpdk.org To: Daniel Verkamp , Olivier Matz Return-path: In-Reply-To: <4057935.qMb1xRYjf6@xps> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 01/07/2017 13:14, Thomas Monjalon: > 30/06/2017 13:36, Olivier Matz: > > On Fri, 2 Jun 2017 13:12:13 -0700, Daniel Verkamp wrote: > > > rte_memzone_reserve() provides cache line alignment, but > > > struct rte_ring may require more than cache line alignment: on x86-64, > > > it needs 128-byte alignment due to PROD_ALIGN and CONS_ALIGN, which are > > > 128 bytes, but cache line size is 64 bytes. > > > > > > Fixes runtime warnings with UBSan enabled. > > > > > > Fixes: d9f0d3a1ffd4 ("ring: remove split cacheline build setting") > > > > > > Signed-off-by: Daniel Verkamp > > > > Acked-by: Olivier Matz > > Applied, thanks and Cc stable@dpdk.org ;)