[PATCH] config/arm: fix the cacheline size for Grace CPU

[PATCH] config/arm: fix the cacheline size for Grace CPU

[Bing Zhao]

The Nvidia Grace platform has a cacheline size with 64B, unlike the
128B size on other arm64 generic platforms. In the meson file, the
cacheline size is missing to be defined explicitly. So it will choose
128 for building and it will impact the performance.

In the ACM whitepaper, "The NVIDIA Grace CPU implements 72 Neoverse V2
Cores [16] with a 64-B cache line size".

Reference link:
https://dl.acm.org/doi/10.1145/3723851.3723853

Fixes: d007038c0121 ("config/arm: add NVIDIA Grace CPU")
Cc: honnappa.nagarahalli@arm.com
Cc: stable@dpdk.org

Signed-off-by: Bing Zhao <bingz@nvidia.com>
---
 config/arm/meson.build | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/config/arm/meson.build b/config/arm/meson.build
index 523b0fc0ed..f7eac7da0a 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -535,6 +535,9 @@ soc_grace = {
     'implementer': '0x41',
     'part_number': '0xd4f',
     'extra_march_features': ['crypto'],
+    'flags': [
+        ['RTE_CACHE_LINE_SIZE', '"64"'],
+    ],
     'numa': true
 }
 
-- 
2.34.1

Re: [PATCH] config/arm: fix the cacheline size for Grace CPU

[Thomas Monjalon]

17/03/2026 10:17, Bing Zhao:
> The Nvidia Grace platform has a cacheline size with 64B, unlike the
> 128B size on other arm64 generic platforms. In the meson file, the
> cacheline size is missing to be defined explicitly. So it will choose
> 128 for building and it will impact the performance.

Grace has
	'implementer': '0x41',
which is implementer_arm with
	['RTE_CACHE_LINE_SIZE', 64],
so I think this patch is not required.


> @@ -535,6 +535,9 @@ soc_grace = {
>      'implementer': '0x41',
>      'part_number': '0xd4f',
>      'extra_march_features': ['crypto'],
> +    'flags': [
> +        ['RTE_CACHE_LINE_SIZE', '"64"'],
> +    ],