From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ferruh Yigit Subject: Re: [PATCH v5 12/14] net/avf: enable sse vector Rx Tx func Date: Tue, 9 Jan 2018 17:58:22 +0000 Message-ID: <229ca995-575b-21c7-cd83-4163563e7f82@intel.com> References: <1515140505-38655-1-git-send-email-wenzhuo.lu@intel.com> <1515388414-16214-1-git-send-email-wenzhuo.lu@intel.com> <1515388414-16214-13-git-send-email-wenzhuo.lu@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Cc: Jingjing Wu To: Wenzhuo Lu , dev@dpdk.org Return-path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id AD5901B1DE for ; Tue, 9 Jan 2018 18:58:23 +0100 (CET) In-Reply-To: <1515388414-16214-13-git-send-email-wenzhuo.lu@intel.com> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 1/8/2018 5:13 AM, Wenzhuo Lu wrote: > From: Jingjing Wu > > Signed-off-by: Jingjing Wu <...> > @@ -31,5 +31,6 @@ SRCS-$(CONFIG_RTE_LIBRTE_AVF_PMD) += avf_common.c > SRCS-$(CONFIG_RTE_LIBRTE_AVF_PMD) += avf_ethdev.c > SRCS-$(CONFIG_RTE_LIBRTE_AVF_PMD) += avf_vchnl.c > SRCS-$(CONFIG_RTE_LIBRTE_AVF_PMD) += avf_rxtx.c > +SRCS-$(CONFIG_RTE_LIBRTE_AVF_INC_VECTOR) += avf_rxtx_vec_sse.c You may need to wrap this with an arch check to not break other architecture builds.