From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Monjalon Subject: Re: [PATCH v3 2/2] eal/x86: Use lock-prefixed instructions to reduce cost of rte_smp_mb() Date: Mon, 29 Jan 2018 16:47:45 +0100 Message-ID: <3552780.vzqTqTtnLr@xps> References: <1516028680-2342-3-git-send-email-konstantin.ananyev@intel.com> <1516028971-3409-1-git-send-email-konstantin.ananyev@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Cc: dev@dpdk.org To: Konstantin Ananyev Return-path: Received: from out3-smtp.messagingengine.com (out3-smtp.messagingengine.com [66.111.4.27]) by dpdk.org (Postfix) with ESMTP id 600211B8A9 for ; Mon, 29 Jan 2018 16:48:32 +0100 (CET) In-Reply-To: <1516028971-3409-1-git-send-email-konstantin.ananyev@intel.com> List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" 15/01/2018 16:09, Konstantin Ananyev: > On x86 it is possible to use lock-prefixed instructions to get > the similar effect as mfence. > As pointed by Java guys, on most modern HW that gives a better > performance than using mfence: > https://shipilev.net/blog/2014/on-the-fence-with-dependencies/ > That patch adopts that technique for rte_smp_mb() implementation. > On BDW 2.2 mb_autotest on single lcore reports 2X cycle reduction, > i.e. from ~110 to ~55 cycles per operation. > > Signed-off-by: Konstantin Ananyev > Acked-by: Bruce Richardson Applied, thanks