From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 978DEC433ED for ; Tue, 18 May 2021 16:28:39 +0000 (UTC) Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by mail.kernel.org (Postfix) with ESMTP id 1D8126124C for ; Tue, 18 May 2021 16:28:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1D8126124C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4AF094068E; Tue, 18 May 2021 18:28:38 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id 8D3CE40041 for ; Tue, 18 May 2021 18:28:37 +0200 (CEST) IronPort-SDR: IlyeglI7Qea3qVjIqeCtmajRXB+nWx2j1EO8QJA2X2KgJn71qiIJztn9vxvFxl9DBdwWw46z+z CMfJP85A8SuQ== X-IronPort-AV: E=McAfee;i="6200,9189,9988"; a="286288386" X-IronPort-AV: E=Sophos;i="5.82,310,1613462400"; d="scan'208";a="286288386" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2021 09:27:30 -0700 IronPort-SDR: V68bAaZwOzdgh8Nr4SVrF1rLqCBVQlWzfs2bbJ7KT1aZXCIYxW6dQ+JEoMke9cMNUtkVovAy1S ppLBCrEYnWTg== X-IronPort-AV: E=Sophos;i="5.82,310,1613462400"; d="scan'208";a="439512626" Received: from fyigit-mobl1.ger.corp.intel.com (HELO [10.213.224.73]) ([10.213.224.73]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 May 2021 09:27:24 -0700 To: Honnappa Nagarahalli , Chengwen Feng , "thomas@monjalon.net" Cc: "dev@dpdk.org" , "jerinj@marvell.com" , Ruifeng Wang , "viktorin@rehivetech.com" , "bruce.richardson@intel.com" , "jerinjacobk@gmail.com" , "juraj.linkes@pantheon.tech" , nd References: <1620808126-18876-1-git-send-email-fengchengwen@huawei.com> <1620986039-29475-1-git-send-email-fengchengwen@huawei.com> <1620986039-29475-3-git-send-email-fengchengwen@huawei.com> From: Ferruh Yigit X-User: ferruhy Message-ID: <394de3ea-f0ba-a5a3-e751-be04f479281d@intel.com> Date: Tue, 18 May 2021 17:27:20 +0100 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [dpdk-dev] [PATCH v5 2/2] net/hns3: refactor SVE code compile method X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 5/14/2021 3:12 PM, Honnappa Nagarahalli wrote: > > >> >> Currently, the SVE code is compiled only when -march supports SVE (e.g. '- >> march=armv8.2a+sve'), there maybe some problem[1] with this approach. >> >> The solution: >> a. If the minimum instruction set support SVE then compiles it. >> b. Else if the compiler support SVE then compiles it. >> c. Otherwise don't compile it. >> >> [1] https://mails.dpdk.org/archives/dev/2021-April/208189.html >> >> Fixes: 8c25b02b082a ("net/hns3: fix enabling SVE Rx/Tx") >> Fixes: 952ebacce4f2 ("net/hns3: support SVE Rx") >> Cc: stable@dpdk.org >> >> Signed-off-by: Chengwen Feng > Looks good to me. > Reviewed-by: Honnappa Nagarahalli > Applied to dpdk-next-net/main, thanks. (Only this patch, 2/2, applied, not whole set)