From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gyumin Subject: Re: Relationship between H/W ring and S/W ring Date: Fri, 31 Oct 2014 09:51:56 +0900 Message-ID: <5452DD2C.8030402@gmail.com> References: <5451E980.2060707@gmail.com> <20141030095522.GA4460@bricha3-MOBL3> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable To: Bruce Richardson , dev-VfR2kkLFssw@public.gmane.org Return-path: In-Reply-To: <20141030095522.GA4460@bricha3-MOBL3> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces-VfR2kkLFssw@public.gmane.org Sender: "dev" Thanks Bruce. I also agree with that the size of the S/W ring depends on the=20 configuration parameters because the size of the S/W ring is=20 /sizeof(struct igb_rx_entry) * len/ in the ixgbe_dev_rx_queue_setup=20 function. H/W ring is also allocated in the same function by using the=20 ring_dma_zone_reserve function, and its size is RX_RING_SZ. I don't=20 think the RX_RING_SZ is configurable but it is fixed value. Is there any=20 other code configuring the size of H/W ring? 2014-10-30 =EC=98=A4=ED=9B=84 6:55=EC=97=90 Bruce Richardson =EC=9D=B4(=EA= =B0=80) =EC=93=B4 =EA=B8=80: > On Thu, Oct 30, 2014 at 04:32:16PM +0900, Gyumin wrote: >> Hi >> >> I`m reading the ixgbe code especially about H/W ring and S/W ring. Is = the >> relationship between H/W ring and S/W ring one-to-one mapping? >> As far as I know, H/W ring size is determined in the code(hard coded) = while >> S/W ring size is determined in port configuration time. >> In the ixgbe_rx_alloc_bufs function, H/W ring header address and packe= t >> address indicate the DMA address of S/W ring's mbuf. I understand it m= eans >> that the relationship between the H/W ring and S/W ring is one-to-one >> mapping. For example, if the size of H/W ring is greater than the size= of >> S/W ring then some portion of H/W ring is unused. Is it correct? >> >> Thanks > Hi, > > Yes, there is a 1:1 mapping between the hardware and software ring entr= ies, and both are sized depending on the configuration parameters passed = to the ring setup APIs. As you state, the HW ring contains the DMA addres= ses of the packet buffers, while the sw_ring contains the pointers to the= original mbufs. The two rings are always kept in sync in the code. > > /Bruce >