From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Tan, Jianfeng" Subject: Re: [PATCH 0/4] virtio support for container Date: Tue, 12 Jan 2016 13:46:51 +0800 Message-ID: <5694934B.5070900@intel.com> References: <1446748276-132087-1-git-send-email-jianfeng.tan@intel.com> <1452426182-86851-1-git-send-email-jianfeng.tan@intel.com> <569490D9.10803@igel.co.jp> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Cc: nakajima.yoshihiro@lab.ntt.co.jp, mst@redhat.com, ann.zhuangyanying@huawei.com To: Tetsuya Mukawa , dev@dpdk.org, huawei.xie@intel.com Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id D9AB9567A for ; Tue, 12 Jan 2016 06:46:55 +0100 (CET) In-Reply-To: <569490D9.10803@igel.co.jp> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Tetsuya, > Hi Jianfeng and Xie, > > I guess my implementation and yours have a lot of common code, so I will > try to rebase my patch on yours. We also think so. And before you rebase your code, I think we can rely on Yuanhan's struct virtio_pci_ops to make the code structure brief and clear, as discussed in your patch's thread, i.e., we both rebase our code according to Yuanhan's code. Is that OK? > > BTW, one thing I need to change your memory allocation way is that > mmaped address should be under 44bit(32 + PAGE_SHIFT) to work with my patch. > This is because VIRTIO_PCI_QUEUE_PFN register only accepts such address. > (I may need to add one more EAL parameter like "--mmap-under
") It makes sense. Thanks, Jianfeng > > Thanks, > Tetsuya