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This patchset attempts to > suggest a viable model to build rte_flow parsers as graphs, by offering a > lightweight header only library to build rte_flow parsering graphs without too > much boilerplate and complexity. > > Most of the patchset is about Intel drivers, but they are meant as > reimplementations as well as examples for the rest of the community to assess > how to build parsers using this new infrastructure. I expect the first two > patches will be of most interest to non-Intel reviewers, as they deal with > building two reusable parser architecture pieces. > > The first piece is a new flow graph helper in ethdev. Its purpose is > deliberately narrow: it targets the protocol-graph part of rte_flow pattern > parsing, where drivers walk packet headers and validate legal item sequences and > parameters. That does not cover all possible rte_flow features, especially more > exotic flow items, but it does cover a large and widely shared part of what > existing drivers need to do. Or, to put it in other words, the only flow items > this infrastructure *doesn't* cover is things that do not lend themselves well > to be parsed as a graph of protocol headers (e.g. conntrack items). Everything > else should be covered or cover-able. In practice, just about all drivers will > benefit from graph parsing as all but one of them implement only the protocol > stack parts, which are the ones targeted by the graph helper. > > The second piece is a reusable flow engine framework for Intel Ethernet drivers. > This is kept Intel-local because I do not feel it is even appropriate to define > such a framework for all drivers to use in the first place. Even so, the intent > is to establish a cleaner parser architecture with a defined interaction model, > explicit memory ownership rules, locking, initialization sequence, > implementations of rte_flow API entry points, flow replay and memory cleanup, > and engine definitions that do not block secondary-process-safe usage. It is my > hope that this would serve as a model for other drivers to follow, expand on, > rework, and improve, so that maybe down the line we *might* have a common > rte_flow infrastructure for drivers to use. > > Most of the rest of the series is parser reimplementation, but that is mainly > the vehicle for demonstrating and validating those two pieces. ixgbe and i40e > are wired into the new common parsing path, and their existing parsers are > migrated incrementally to the graph-based model. Besides reducing ad hoc parser > code, this also makes validation more explicit and more consistent. In a few > places that means invalid inputs that were previously ignored, deferred, or > interpreted loosely are now rejected earlier and more strictly, without any > increase in code complexity (in fact, with marked *decrease* of it!). > Recheck-request: rebase=next-net-intel, iol-compile-amd64-testing, iol-intel-Functional, iol-intel-Performance -- Thanks, Anatoly