From: "Medvedkin, Vladimir" <vladimir.medvedkin@intel.com>
To: Bruce Richardson <bruce.richardson@intel.com>, <dev@dpdk.org>
Subject: Re: [PATCH] net/intel: fix wrap-around check in simple Tx scalar path
Date: Thu, 26 Feb 2026 17:44:21 +0000 [thread overview]
Message-ID: <60ef6b0d-40c9-4931-b07a-caeb239121b7@intel.com> (raw)
In-Reply-To: <20260226153636.3925387-1-bruce.richardson@intel.com>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
On 2/26/2026 3:36 PM, Bruce Richardson wrote:
> There was an error condition when the burst of packets being transmitted
> ended exactly on the last descriptor of the ring. In that instance
> alone, we ended up writing an invalid tx_tail value to the hardware, of
> ring_size rather than of zero. Add an explicit check for this case to
> the simple Tx path code.
>
> Fixes: 9bacf6a81b92 ("net/intel: align scalar simple Tx path with vector logic")
>
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> ---
> drivers/net/intel/common/tx_scalar.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/net/intel/common/tx_scalar.h b/drivers/net/intel/common/tx_scalar.h
> index 4475995180..9fcd2e4733 100644
> --- a/drivers/net/intel/common/tx_scalar.h
> +++ b/drivers/net/intel/common/tx_scalar.h
> @@ -145,6 +145,8 @@ ci_xmit_burst_simple(struct ci_tx_queue *txq,
> if (txq->tx_next_rs >= txq->nb_tx_desc)
> txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
> }
> + if (tx_id == txq->nb_tx_desc)
> + tx_id = 0;
>
> txq->tx_tail = tx_id;
>
--
Regards,
Vladimir
prev parent reply other threads:[~2026-02-26 17:44 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-26 15:36 [PATCH] net/intel: fix wrap-around check in simple Tx scalar path Bruce Richardson
2026-02-26 16:08 ` Burakov, Anatoly
2026-03-02 10:20 ` Bruce Richardson
2026-02-26 17:44 ` Medvedkin, Vladimir [this message]
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