From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Monjalon Subject: Re: [PATCH] eal/armv8: high-resolution cycle counter Date: Tue, 04 Oct 2016 10:46:54 +0200 Message-ID: <7060882.CcMXuoxNGC@xps13> References: <1471521090-21067-1-git-send-email-jerin.jacob@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Cc: Hemant Agrawal , dev@dpdk.org, "jianbo.liu@linaro.org" , "viktorin@rehivetech.com" To: Jerin Jacob Return-path: Received: from mail-wm0-f51.google.com (mail-wm0-f51.google.com [74.125.82.51]) by dpdk.org (Postfix) with ESMTP id 8F02A29CA for ; Tue, 4 Oct 2016 10:46:57 +0200 (CEST) Received: by mail-wm0-f51.google.com with SMTP id b201so130272855wmb.0 for ; Tue, 04 Oct 2016 01:46:57 -0700 (PDT) In-Reply-To: List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > > Existing cntvct_el0 based rte_rdtsc() provides portable means to get wall clock > > counter at user space. Typically it runs at <= 100MHz. > > > > The alternative method to enable rte_rdtsc() for high resolution wall clock > > counter is through armv8 PMU subsystem. > > The PMU cycle counter runs at CPU frequency, However, access to PMU cycle > > counter from user space is not enabled by default in the arm64 linux kernel. > > It is possible to enable cycle counter at user space access by configuring the > > PMU from the privileged mode (kernel space). > > > > by default rte_rdtsc() implementation uses portable > > cntvct_el0 scheme. Application can choose the PMU based implementation with > > CONFIG_RTE_ARM_EAL_RDTSC_USE_PMU > > > > Signed-off-by: Jerin Jacob > > Acked-by: Hemant Agrawal Applied, thanks Please do not forget documentation and upstreaming efforts.