From mboxrd@z Thu Jan  1 00:00:00 1970
From: Thomas Monjalon <thomas.monjalon@6wind.com>
Subject: Re: [PATCH v6 9/9] table: align rte table hash structs
	for cache line size
Date: Thu, 08 Sep 2016 11:36:23 +0200
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Cc: dev@dpdk.org, "Dumitrescu, Cristian" <cristian.dumitrescu@intel.com>,
 Chao Zhu <chaozhu@linux.vnet.ibm.com>, "Richardson,
 Bruce" <bruce.richardson@intel.com>, "Ananyev,
 Konstantin" <konstantin.ananyev@intel.com>, Pradeep <pradeep@us.ibm.com>
To: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
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2016-08-31 17:29, Dumitrescu, Cristian:
> From: Gowrishankar Muthukrishnan
> > rte table hash structs rte_bucket_4_8, rte_bucket_4_16 and
> > rte_bucket_4_32 have
> > to be cache aligned as required by their corresponding hash create functions
> > rte_table_hash_create_key8_lru etc.
> 
> Hi Gowrishankar,
> 
> My understanding is you are trying to work around the check invoked by the hash table create functions that verifies the size of the bucket header structure is a multiple of the cache line, right?
> 
> Given that the size of this structure is 1x, 2x or 3x times 64 bytes, the check passes on IA CPUs (cache line of 64 bytes; explicit alignment to cache line size is not needed in order to make the size of the structure a multiple of cache line), but not on PPC CPUs (cache line of 128 bytes), correct?
> 
> I don't think your proposal provides the best way to fix this issue, since your code leads to a considerable increase in the memory consumption used per bucket in most cases:
> 	- 100% more memory for 8-byte key hash table
> 	- 0% more for 16-byte key hash table (code does not fix anything, explicit alignment is not needed)
> 	- 50% more for 32-byte key hash table
> 
> I suggest you simply change the check: instead of validating this data structure is a multiple of cache line size, validate it is a multiple of 64 bytes.

Any news please?
The whole series is blocked for this patch.
Should we expect a v7?