Re: [PATCH] net/mlx5: fix NAT64 HW registers calculation

[Raslan Darawsheh <rasland@nvidia.com>]

Hi,


On 25/03/2026 11:58 AM, Bing Zhao wrote:
> mlx5 PMD needs to select a set of 3 HW registers
> which will be used to implement NAT64 flow action.
> For compatibility reasons one of these registers has to be REG_C_6.
> Offending patch introduced a bug to register selection logic.
> If REG_C_6 was not available for use,
> no registers were selected for NAT64.
> So all the registers' information would not be initialized for the
> temporary storage of headers information of NAT64.
> 
> This patch adds missing logic to use the last 3 available tag registers
> in this case, allowing NAT64 flow action to be used.
> 
> Fixes: f15535128617 ("net/mlx5: fix NAT64 register selection")
> Cc: dsosnowski@nvidia.com
> Cc: stable@dpdk.org
> 
> Signed-off-by: Bing Zhao <bingz@nvidia.com>
> Acked-by: Dariusz Sosnowski <dsosnowski@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards
Raslan Darawsheh